Connection to ethernet switch

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

Hi,

I saw this thread:
[About xavier EQOS MAC to MAC - #7 by liu.jialu] and it’s exactly the problem I have. Can you please give more details about the solution?
@liu.jialu I’m using also the Marvell 88E6321, and I can’t make the ethernet work. Can you please share the schematics connection between the ethernet switch and jetson xavier? I attached mine.

switch_xavier
switch_xavier1244×264 76.4 KB

When I connect the xavier to my carrier board, I can see on scope that the 125MHz clock out from the switch is distorted, and the clock from the jetson to the switch is degraded - about half 0.8Vp-p, but it looks reasonable comparing to the other clock.
Can you help me please? could it be a software issue?

Thank you,

Efi

3

Could you share current dmesg?

4

Hi,

Please see attached.
Please note that for now I’m using the evaluation board .cfg file.
Xavier_Power_Up.txt (91.9 KB)
Thank you,

5

Hi,

There is no error from eqos driver. Even the probe does not start.
Sorry that I am not quite sure about your design… so you remove our original phy and directly connect to Marvell88E6321 switch?

If so, could you contact Marvell for the dts configuration? Our eqos dts is written in MDIO framework of linux. It is a general framework.
https://www.kernel.org/doc/html/latest/networking/phy.html

Also, if your device driver is registerd correctly, it will be shown under

/sys/bus/mdio_bus/drivers

6

Hi Wayne,

Even the probe does not start.

What do you mean by that?

Sorry that I am not quite sure about your design… so you remove our original phy and directly connect to Marvell88E6321 switch?

Yes, I connected the switch, which has RGMII interface directly to the Xavier. The switch SMI (MDIO, MDC) is controlled by MCU and not by the Xavier.

The problem I see is that the clock from the switch is very attenuated and distorted. Could it be something concerning the Xavier configuration or should I look for signal integrity issues?
The trace length is about 6.5 inches and I have a series resistor close to the switch output.

Thank you very much,

Efi

7

Hi,

I meant the software log from kernel does not do anything. It does not start the device probing. It looks like we don’t support Marvell88E621 driver.

Please contact vendor to find out what software patch is needed for dts and which phy driver is needed.

8

Hi Wayne,

Thanks again for your answer, but I think I was misunderstood. I don’t need the driver for the Marvell component because I control it using an external microcontroller.
My main concern is that the 125MHz clock signal of the RGMII interface is distorted when connected to the RXC pin in Xavier.
Is there a way to control this pin input impedance using the device tree (or maybe other option), or do you think it’s a signal integrity issue?

Efi

10

Hi efio,

Did you check with vendor and follow the reference design of Marvell88E6321 switch? Did you ever successfully make the switch work on other project? Also for Xavier, the ethernet reference design is in OEM DG and devkit schematic, you can check that first.