Controlling Nano SPI CS

There are multiple topics that discuss this and I followed these to make the following changes to my DTB:
Added cs-gpios = <0x13 0x0 0x0 0x14 0x1 0x0>;
Removed nvidia,enable-hw-based-cs;
Made SPI CS GPIOs in the pinmux

    spi@7000d400 {
            compatible = "nvidia,tegra210-spi";
            reg = <0x0 0x7000d400 0x0 0x200>;
            interrupts = <0x0 0x3b 0x4>;
            iommus = <0x30 0xe>;
            #address-cells = <0x1>;
            #size-cells = <0x0>;
            dmas = <0x51 0xf 0x51 0xf>;
            dma-names = "rx", "tx";
            nvidia,clk-parents = "pll_p", "clk_m";
            clocks = <0x26 0x29 0x26 0xf3 0x26 0xe9>;
            clock-names = "spi", "pll_p", "clk_m";
            resets = <0x26 0x29>;
            reset-names = "spi";
            status = "okay";
            cs-gpios = <0x13 0x0 0x0 0x14 0x1 0x0>;
            linux,phandle = <0xf8>;
            phandle = <0xf8>;

            prod-settings {
                    #prod-cells = <0x3>;

                    prod {
                            prod = <0x4 0xfff 0x0>;
                    };

                    prod_c_flash {
                            status = "disabled";
                            prod = <0x4 0x3f 0x7>;
                    };

                    prod_c_loop {
                            status = "disabled";
                            prod = <0x4 0xfff 0x44b>;
                    };
            };

            spi@0 {
                    compatible = "tegra-spidev";
                    reg = <0x0>;
                    spi-max-frequency = <0x1f78a40>;

                    controller-data {
                            nvidia,rx-clk-tap-delay = <0x7>;
                    };
            };

            spi@1 {
                    compatible = "tegra-spidev";
                    reg = <0x1>;
                    spi-max-frequency = <0x1f78a40>;

                    controller-data {
                            nvidia,rx-clk-tap-delay = <0x7>;
                    };
            };
    };

I see the following error in dmesg:
[ 1.628152] spi-tegra114: probe of 7000d400.spi failed with error -22

What am I doing wrong?

Try below.

cs-gpios = <&gpio TEGRA_GPIO(C, 3) GPIO_ACTIVE_LOW>, <&gpio TEGRA_GPIO(C, 4) GPIO_ACTIVE_LOW>;

Thanks Shane. I tried that. But in the resulting build, CS doesn’t toggle at all.

Could you please summarize the changes needed to enable SW CS?

What’s your BSP version?
What’s the gpio dump.

sudo cat /sys/kernel/debug/tegra_gpio

I am using R32.7.1.

sudo cat /sys/kernel/debug/tegra_gpio

Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL

A: 0:0 64 40 40 24 00 00 000000

B: 0:1 00 00 00 00 00 00 000000

C: 0:2 18 18 18 00 00 00 000000

D: 0:3 00 00 00 00 00 00 000000

E: 1:0 4f 0c 00 00 00 00 000000

F: 1:1 00 00 00 00 00 00 000000

G: 1:2 04 00 00 00 00 00 000000

H: 1:3 fd d9 00 20 00 00 000000

I: 2:0 07 07 07 00 00 00 000000

J: 2:1 fc 88 00 14 00 40 004040

K: 2:2 00 00 00 00 00 00 000000

L: 2:3 00 00 00 00 00 00 000000

M: 3:0 00 00 00 00 00 00 000000

N: 3:1 00 00 00 00 00 00 000000

O: 3:2 00 00 00 00 00 00 000000

P: 3:3 3f 03 00 30 00 00 000000

Q: 4:0 00 00 00 00 00 00 000000

R: 4:1 00 00 00 00 00 00 000000

S: 4:2 a0 a0 00 00 00 00 000000

T: 4:3 01 01 00 00 00 00 000000

U: 5:0 00 00 00 00 00 00 000000

V: 5:1 03 01 00 00 00 00 000000

W: 5:2 00 00 00 00 00 00 000000

X: 5:3 78 08 08 70 00 60 606000

Y: 6:0 06 04 00 02 00 00 000000

Z: 6:1 0f 08 00 06 00 04 000400

AA: 6:2 00 00 00 00 00 00 000000

BB: 6:3 01 01 00 00 00 00 000000

CC: 7:0 91 81 91 00 00 10 101000

DD: 7:1 00 00 00 00 00 00 000000

EE: 7:2 00 00 00 00 00 00 000000

FF: 7:3 00 00 00 00 00 00 000000

Could you dump the GPIO without add cs-gpios.

Thanks

This is without cs-gpios:

sudo cat /sys/kernel/debug/tegra_gpio

Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL

A: 0:0 64 40 40 24 00 00 000000

B: 0:1 00 00 00 00 00 00 000000

C: 0:2 00 00 00 00 00 00 000000

D: 0:3 00 00 00 00 00 00 000000

E: 1:0 4f 0c 00 00 00 00 000000

F: 1:1 00 00 00 00 00 00 000000

G: 1:2 04 00 00 00 00 00 000000

H: 1:3 fd d9 00 20 00 00 000000

I: 2:0 07 07 07 00 00 00 000000

J: 2:1 fc 88 00 14 00 40 004040

K: 2:2 00 00 00 00 00 00 000000

L: 2:3 00 00 00 00 00 00 000000

M: 3:0 00 00 00 00 00 00 000000

N: 3:1 00 00 00 00 00 00 000000

O: 3:2 00 00 00 00 00 00 000000

P: 3:3 3f 03 00 30 00 00 000000

Q: 4:0 00 00 00 00 00 00 000000

R: 4:1 00 00 00 00 00 00 000000

S: 4:2 a0 a0 00 00 00 00 000000

T: 4:3 01 01 00 00 00 00 000000

U: 5:0 00 00 00 00 00 00 000000

V: 5:1 03 01 00 00 00 00 000000

W: 5:2 00 00 00 00 00 00 000000

X: 5:3 78 08 08 70 00 60 606000

Y: 6:0 06 04 00 02 00 00 000000

Z: 6:1 0f 08 08 06 00 04 000400

AA: 6:2 00 00 00 00 00 00 000000

BB: 6:3 01 01 00 00 00 00 000000

CC: 7:0 91 81 91 00 00 10 101000

DD: 7:1 00 00 00 00 00 00 000000

EE: 7:2 00 00 00 00 00 00 000000

FF: 7:3 00 00 00 00 00 00 000000

Looks like the cs-gpios configure is correct.
Could you print some message to below driver to check the cs-gpio config and also confirm the gpio_set_value() been called.

…/kernel/kernel-xx/drivers/spi/spi-tegra114.c

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