Design Considerations for Orin NX PCIe Polarity Inversion

[ghw_dsg]

I am in the process of designing a circuit diagram for the creation of a carrier board that utilizes the Orin NX.
Upon reviewing the Orin NX Design Guide, I have confirmed that PCIe polarity inversion is possible.
(Referenced from Jetson_Orin_NX_Series_and_Orin_Nano_Series_Design_Guide Chapter 7.2 PCIe “Lane reversal and polarity inversion (P/N swapping) is supported per controller.”)

I have several questions related to this:

1. In the attached picture, there is a section boxed in which appears to depict pins with swapped polarity. When applying polarity inversion, is it only possible to apply it to this particular section of pins?

2. Or, do I need to apply it to the entire PCIE0_TX0~3 section?

3. Or do I need to apply it oppositely to the entire PCIE0, both RX and TX, respectively?

I would appreciate a detailed explanation regarding the design of PCIe Polarity Inversion.
Thank you.

[Trumany]

This is handled automatically during the PCIe link training process so you dont need to do anything in software. Any combination of lanes can be P/N swapped.