Jetson ORIN module PCIe lane-polarity inversion

Autonomous Machines Jetson & Embedded Systems Jetson AGX Orin
1

There have been a few discussions about lane-reversal, but I didn’t find any topic about the PCIe lane P/N inversion.

My specific question is, are carrier-board designer able to invert the P/N polarities on a lane-based? Example, a port is configured to be x8 (UPHY Lane [12:19]) PCIe link, is it ok to only invert 4-lanes P/N polarities, while keep the other 4-lanes in default polarities?

The reason behind is, I came across the DG v1.2 pinout table, it seems in UPHY Lane[12:19], 4-lanes P/N pins are arranged in different order than other 4-lanes. This arrangement would likely cause routing issues on the carrier board. To ease the routing challenges, 4-lanes P/N polarities may need to be inverted.
See below picture (red-circles vs. blue-circles). DG v1.2 allows P/N inversion, another document says P/N can be inverted individually, but I really need to give above example to clarify with Nvidia that partial inversion of the P/N polarities is valid.

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3

Wondering if somebody had a look at this ticket. Please provide an update. Thanks

4

Every PCIe lane supports polarity inversion. In multi-lane PCIe configuration, each lane can have polarity inversion enabled for better PCB routing as needed.

5

Thank you, Trumany
Which register can be used to enable lane-based polarity? I searched through the SOC reference manual. I did find some polarity control for video interface C-PHY, D-PHY, but I didn’t find any similar register control in UPHY or PCIe sections.

6

Any updates on my last question? Thanks

7

This is handled automatically during the PCIe link training process so you dont need to do anything in software. Any combination of lanes can be P/N swapped.

8

Awesome! Thanks for the clarification

9

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