There have been a few discussions about lane-reversal, but I didn’t find any topic about the PCIe lane P/N inversion.
My specific question is, are carrier-board designer able to invert the P/N polarities on a lane-based? Example, a port is configured to be x8 (UPHY Lane [12:19]) PCIe link, is it ok to only invert 4-lanes P/N polarities, while keep the other 4-lanes in default polarities?
The reason behind is, I came across the DG v1.2 pinout table, it seems in UPHY Lane[12:19], 4-lanes P/N pins are arranged in different order than other 4-lanes. This arrangement would likely cause routing issues on the carrier board. To ease the routing challenges, 4-lanes P/N polarities may need to be inverted.
See below picture (red-circles vs. blue-circles). DG v1.2 allows P/N inversion, another document says P/N can be inverted individually, but I really need to give above example to clarify with Nvidia that partial inversion of the P/N polarities is valid.