Disable Serial Port Debug Console on TX1


I am trying to disable serial port debug as I want to use /dev/ttyTHS0 with other device, but do not want to risk that TX1 will stuck at boot.

I am using Jetpack 3.3 and I already made the following changes:

  1. Removed “console=ttyS0,115200n8” from the following line in all four “p2371-*.conf” files in “Linux_for_Tegra” folder:
  • CMDLINE_ADD=“console=ttyS0,115200n8 console=tty0 OS=l4t fbcon=map:1 net.ifnames=0”;
  • CMDLINE_ADD=“console=tty0 OS=l4t fbcon=map:1 net.ifnames=0”;
  1. Changed DTB under serial@70006000:
  • compatible = “nvidia,tegra210-uart”, “nvidia,tegra114-hsuart”, “nvidia,tegra20-uart”;
  • compatible = “nvidia,tegra114-hsuart”;
  • resets = <0x41 0x6>;
  • reset-names = “serial”;
  • console-port;
  • sqa-automation-port;
  • enable-rx-poll-timer;
  • linux,phandle = <0x140>;
  • phandle = <0x140>;
  1. Removed from DTB:
- fragement@5 {
-     odm-data = "enable-high-speed-uart";
-     override@0 {
-         target = <0x140>;
-         _overlay_ {
-             compatible = "nvidia,tegra114-hsuart";
-             early-print-console-channel;
-             resets = <0x41 0x6>;
-             reset-names = "serial";
-         };
-     };
- };

I have replaced new DTB (tegra210-jetson-tx1-p2597-2180-a01-devkit.dtb) with the old one in the following places:

Then flashed with: sudo ./flash jetson-tx1 mmcblk0p1

Something seems to work as I can see /dev/ttyTHS0 and use it with no problems, but still can prevent booting if writing something on that serial during the boot. Is there any additional step required?

Best regards,

hello mp12,

  1. you should only replace the device tree with 64_TX1/Linux_for_Tegra_64_tx1/kernel/dtb, the others was copy from there during flashing.

  2. please also refer to Topic 1036286, you need to apply changes then you’re able to flash the DTB partition only to speed-up your development.

Thanks for some speedups, but they do not solve the problem.

Is there anything similar to the first step of this answer for TX1 (28.2)?

hello mp12,

those configuration were for TX2, you cannot apply that for TX1 since the code flow were different.
may I know what’s your purpose to disable serial port console on TX1, thanks

We need 3rd UART in UAV application and do not want that Tegra will stuck at boot.

If no other solution available, we will use hardware solution with additional analog switch but prefer solution without that.

Best regards

Hello all,

Is there any update on this issue ? I am struggling to use UART0 as a serial port and disable console on it as well but I have had no luck so far.

I am using Jetson TX1, Auvidea J140 board and JetPack 3.3.

What are the steps to disable serial console on UART0 and in sequence use it as /dev/ttyTHS0 ?

Hello Pavlos,

I solved the problem with mux which is controled by Jetson TX1. When TX1 boots it flip the switch and only then external device can send anything to TX1.

Best regards,

Can you provide a little more insight as to what you changed ?

Currently from the .conf file I have removed

CMDLINE_ADD="console=ttyS0,115200n8 console=tty0 OS=l4t fbcon=map:1 net.ifnames=0";

Also in the DTB I have the following :

serial@70006000 {
	compatible = "nvidia,tegra114-hsuart";
	status = "okay";

serial@70006040 {
	compatible = "nvidia,tegra114-hsuart";
	status = "okay";

serial@70006200 {
	compatible = "nvidia,tegra114-hsuart";
	status = "okay";

serial@70006300 {
	compatible = "nvidia,tegra114-hsuart";
	status = "okay";

chosen {
	fastboot-instructions = "Press <PWR> to select, <VOL D/REC> for selection move\n";

chosen {
	verified-boot {

However, when I reflash the TX1 I get this output from the dmesg | grep tty command

nvidia@tegra-ubuntu:~$ dmesg | grep tty
[    0.000000] Kernel command line: root=/dev/mmcblk0p1 rw rootwait androidboot.modem=none androidboot.serialno=0085030e0000001c87a5 androidboot.security=non-secure tegraid= ddr_die=2048M@2048M ddr_die=2048M@4096M section=256M memtype=0 vpr_resize usb_port_owner_info=0 lane_owner_info=0 emc_max_dvfs=0 touch_id=0@63 video=tegrafb no_console_suspend=1 console=ttyS0,115200n8 debug_uartport=lsport,0 earlyprintk=uart8250-32bit,0x70006000 maxcpus=4 usbcore.old_scheme_first=1 lp0_vec=0x1000@0xff2bf000 nvdumper_reserved=0xff23f000 core_edp_mv=1075 core_edp_ma=4000 tegra_fbmem=0x800000@0x92c9d000 is_hdmi_initialised=1 gpt root=/dev/mmcblk0p1 rw rootwait
[    0.503383] 70006000.serial: ttyTHS0 at MMIO 0x70006000 (irq = 320, base_baud = 0) is a TEGRA_UART
[    0.503851] 70006040.serial: ttyTHS1 at MMIO 0x70006040 (irq = 321, base_baud = 0) is a TEGRA_UART
[    0.504307] 70006200.serial: ttyTHS2 at MMIO 0x70006200 (irq = 322, base_baud = 0) is a TEGRA_UART
[    0.504752] 70006300.serial: ttyTHS3 at MMIO 0x70006300 (irq = 323, base_baud = 0) is a TEGRA_UART
[    1.465365] systemd[1]: Created slice system-getty.slice.
[    1.465972] systemd[1]: Created slice system-serial\x2dgetty.slice.