Hi, I’m trying to determine what ECC is available on Jetson platforms. Based on what I found it seems that in some cases, such as the industrial grade Jetson AGX, where there is ECC on the global memory. But I don’t see any mention of the Shared Memory that would be used by a Thread Block.
When looking at the whitepaper for the volta architecture it says: “Other key structures in GV100 are also protected by SECDED ECC, including the SM register file, L1 cache, and L2 cache. The same SECDED ECC protection was provided across the same structures in Pascal GP100 to ensure a high level of error detection and correction, and overall memory resiliency.”
In this case, it does should like ECC is on the shared memory? Perhaps this is only the case on non-embedded devices?