Enabling SPI on Jetson AGX Xavier

I enabled spi1 on pins (19,21,23,24,26) using jetson-io.py and now there is a /dev/spidev0.0 device file present. As I understand it, the numbers represent SPI bus 0, chip select 0. Shouldn’t there be a /dev/spidev0.1 as well, for CS1?

Also, I would like to connect an additional SPI device as an independent slave (not daisy-chained). Each device has two CS pins, one for an EEPROM and the other for an ADC, so I’ll need four CS pins. Can I use a GPIO pin as CS, or would I need to reconfigure a second SPI controller? Is that possible on the AGX Xavier?