Hi, we’re using Orin NX with BSP 36.4, we have this pinmux in our device tree overlay, it’s important to be able to use the pin soc_gpio29_pq2 as output.
However, with this dtsi, the GPIO PQ.02 is ignored - cannot be controlled as output. Always stays low.
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
/ {
overlay-name = "Device pinmux";
compatible = JETSON_COMPATIBLE;
fragment@0 {
target = <&pinmux>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&jetson_io_pinmux>;
jetson_io_pinmux: device-evt-pinmux {
// audio config: i2s pins
soc_gpio41_ph7 {
nvidia,pins = "soc_gpio41_ph7";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_sclk";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
soc_gpio42_pi0 {
nvidia,pins = "soc_gpio42_pi0";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_dout";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
soc_gpio43_pi1 {
nvidia,pins = "soc_gpio43_pi1";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_din";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
soc_gpio44_pi2 {
nvidia,pins = "soc_gpio44_pi2";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_fs";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
// i2c mux gpio MUX0 needs to be configured as GPIO with pull-up
soc_gpio29_pq2 {
nvidia,pins = "soc_gpio29_pq2";
// function is "gpio" but including it here lead to an error message from driver
// nvidia,function = "gpio";
nvidia,pin-label = "soc_gpio29_pq2";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
};
};
};
};
With this dtsi, it works. PQ.02 can be controlled and set high or low. The only change - different order. Why does it matter?
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
/ {
overlay-name = "Device pinmux";
compatible = JETSON_COMPATIBLE;
fragment@0 {
target = <&pinmux>;
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&jetson_io_pinmux>;
jetson_io_pinmux: device-evt-pinmux {
// i2c mux gpio MUX0 needs to be configured as GPIO with pull-up
soc_gpio29_pq2 {
nvidia,pins = "soc_gpio29_pq2";
// function is "gpio" but including it here lead to an error message from driver
// nvidia,function = "gpio";
nvidia,pin-label = "soc_gpio29_pq2";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
// audio config: i2s pins
soc_gpio41_ph7 {
nvidia,pins = "soc_gpio41_ph7";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_sclk";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
soc_gpio42_pi0 {
nvidia,pins = "soc_gpio42_pi0";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_dout";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
soc_gpio43_pi1 {
nvidia,pins = "soc_gpio43_pi1";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_din";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
soc_gpio44_pi2 {
nvidia,pins = "soc_gpio44_pi2";
nvidia,function = "i2s2";
nvidia,pin-label = "i2s2_fs";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};
};
};