you should check the pin via pinmux spreadsheets.
please refer to Xavier NX’s GPIO header file for the port numbers.
for example, $L4T_Sources/r32.5.1/Linux_for_Tegra/source/public/kernel/nvidia/include/dt-bindings/gpio/tegra194-gpio.h
I2S0_DOUT / GPIO3_PT.06, the port after ‘P’ is the GPIO port index, and also the offset numbers.
and, you’ll see the formula in the header file to calculate the GPIO number.
#define TEGRA194_MAIN_GPIO_PORT_T 19
#define TEGRA194_MAIN_GPIO(port, offset) \
((TEGRA194_MAIN_GPIO_PORT_##port * 8) + offset)
the GPIO3_PT.06 gpio number before kernel dynamically allocated is…
((19 * 8) + 6) = 158, that’s what you could control in the bootloader stage.
you’ll need to check the kernel allocation ranges. here shows kernel init messages for the GPIO allocation ranges,
since GPIO3_PT.06 is within gpiochip0, you’ll also add
288 mapping to its correct GPIO number after kernel boot-up.
$ dmesg | grep gpiochip_setup_dev
[ 0.776867] gpiochip_setup_dev: registered GPIOs 288 to 511 on device: gpiochip0 (tegra-gpio)
[ 0.786506] gpiochip_setup_dev: registered GPIOs 248 to 287 on device: gpiochip1 (tegra-gpio-aon)
[ 0.973760] gpiochip_setup_dev: registered GPIOs 240 to 247 on device: gpiochip2 (max77620-gpio)