Gstreamer does not work with more then 2 nvarguscamerasrc's

Autonomous Machines Jetson & Embedded Systems Jetson Orin Nano
, ,
1

Hello

On my custom Board I use a Jetson Orin NX with 4 ar0234 Sensors.
When I run my gstreamer pipeline with 2 nvarguscamerasrc’s everything works as expected.
Whenever I try to run the pipeline with 3 or 4 nvarguscamerasrc’s only 2 sensors will start. It appears to be random which 2 sensors are starting.

I am using the following gstreamer pipeline to test:

gst-launch-1.0
nvarguscamerasrc sensor-id=0 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_0
nvarguscamerasrc sensor-id=1 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_1
nvarguscamerasrc sensor-id=2 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_2
nvarguscamerasrc sensor-id=3 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_3
nvstreammux name=cammux width=1920 height=1080 batch-size=8 batched-push-timeout=-1 !
nvmultistreamtiler rows=2 columns=2 width=1920 height=1080 !
nvvidconv flip-method=0 !
“video/x-raw, format=(string)I420” !
jpegenc quality=85 ! “image/jpeg” ! rtpjpegpay mtu=1400 pt=96 !
udpsink host=192.168.13.211 port=5001 sync=false async=false

I see the error:

Error generated. /dvs/git/dirty/git-master_linux/multimedia/nvgstreamer/gst-nvarguscamera/gstnvarguscamerasrc.cpp, execute:762 Failed to create CaptureSession

In my dmesg output I only see that 2 sensor instances receive the start stream command:

[ 69.179667] nvmap_alloc_handle: PID 1544: gst-launch-1.0: WARNING: All NvMap Allocations must have a tag to identify the subsystem allocating memory.Please pass the tag to the API call NvRmMemHanldeAllocAttr() or relevant.
[ 69.227446] NVRM: The NVIDIA probe routine was not called for 1 device(s).
[ 69.227452] NVRM: This can occur when a driver such as:
NVRM: nouveau, rivafb, nvidiafb or rivatv
NVRM: was loaded and obtained ownership of the NVIDIA device(s).
[ 69.227455] NVRM: Try unloading the conflicting kernel module (and/or
NVRM: reconfigure your kernel without the conflicting
NVRM: driver(s)), then try loading the NVIDIA kernel module
NVRM: again.
[ 69.227456] NVRM: No NVIDIA devices probed.
[ 69.422734] ar0234 31-0018: ar0234_power_on:
[ 69.439608] bwmgr API not supported
[ 69.447451] ar0234 31-0018: ar0234_set_mode: Set mode 0 at CAM0
[ 69.451055] ar0234 31-0018: ar0234_write_table: start write table CAM0
[ 70.042122] ar0234 31-0018: ar0234_set_gain_manual: CAM0 set gain 171
[ 70.042131] ar0234 31-0018: ar0234_set_gain_manual: CAM0 val: 17100 (/100) [times], gain_reg: 0xd
[ 70.042495] ar0234 31-0018: ar0234_set_exposure_manual: CAM0 set exposure val: 27409
[ 70.042499] ar0234 31-0018: ar0234_set_exposure_manual: CAM0 coarse time val:1015
[ 70.042812] ar0234 31-0018: ar0234_set_frame_rate: set frame rate 30 FPS
[ 70.042816] ar0234 31-0018: ar0234_set_frame_rate: val: 30000000, , frame_length: 1220
[ 70.043127] ar0234 31-0018: ar0234_start_streaming: Start stream CAM0
[ 70.043131] ar0234 31-0018: ar0234_write_table: start write table CAM0
[ 70.043857] bwmgr API not supported
[ 70.099201] ar0234 33-0018: ar0234_power_on:
[ 70.117763] bwmgr API not supported
[ 70.117909] ar0234 33-0018: ar0234_set_mode: Set mode 0 at CAM3
[ 70.121591] ar0234 33-0018: ar0234_write_table: start write table CAM3
[ 70.710128] ar0234 33-0018: ar0234_set_gain_manual: CAM3 set gain 171
[ 70.710139] ar0234 33-0018: ar0234_set_gain_manual: CAM3 val: 17100 (/100) [times], gain_reg: 0xd
[ 70.710306] ar0234 33-0018: ar0234_set_exposure_manual: CAM3 set exposure val: 27409
[ 70.710310] ar0234 33-0018: ar0234_set_exposure_manual: CAM3 coarse time val:1015
[ 70.710472] ar0234 33-0018: ar0234_set_frame_rate: set frame rate 30 FPS
[ 70.710476] ar0234 33-0018: ar0234_set_frame_rate: val: 30000000, , frame_length: 1220
[ 70.710640] ar0234 33-0018: ar0234_start_streaming: Start stream CAM3
[ 70.710643] ar0234 33-0018: ar0234_write_table: start write table CAM3

I tried boosting the clocks and setting the power mode to MAX, but it did not change the result.

Any Hints or help is highly appreciated.

Kind Regards

2

Any update for this problem?

Would highly appriciate.

Kind Regards

4

hello knezevic,

please check your system had four camera nodes registered.
for example, $ ls /dev/video*

you may also check developer guide, Applications Using V4L2 IOCTL Directly.
please execute V4L2 IOCTL to verify basic camera functionality.

5

Hi JerryChang

Thanks a lot for the response.

After starting our ar0234 kernel driver we see all 4 camera nodes (video0-3).

All 4 cameras work perfectly fine with v4l2-ctrl and the following command:

v4l2-ctl -d /dev/videoX --set-ctrl bypass_mode=0 --stream-mmap --set-fmt-video=width=1920,height=1200,pixelformat=BA10 --verbose

All 4 cameras work also perfectly fine with gstreamer nvarguscamerasrc when we run one by one.

Any suggestions why we are not able to run 4 cameras with nvarguscamerasrc at the same time with the following command:

gst-launch-1.0
nvarguscamerasrc sensor-id=0 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_0
nvarguscamerasrc sensor-id=1 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_1
nvarguscamerasrc sensor-id=2 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_2
nvarguscamerasrc sensor-id=3 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! cammux.sink_3
nvstreammux name=cammux width=1920 height=1080 batch-size=8 batched-push-timeout=-1 !
nvmultistreamtiler rows=2 columns=2 width=1920 height=1080 !
nvvidconv flip-method=0 !
“video/x-raw, format=(string)I420” !
jpegenc quality=85 ! “image/jpeg” ! rtpjpegpay mtu=1400 pt=96 !
udpsink host=192.168.13.211 port=5001 sync=false async=false

6

We are using Jetson Orin NX 16GB with 2 Lane MIPI configuration.

After further testing I found out that camera on tegra_sinterface = “serial_a” and on tegra_sinterface = “serial_b” can not run at the same time. Same applies to tegra_sinterface = “serial_c” and tegra_sinterface = “serial_d”.

Other combinations, for example serial_a and serial_c work fine if we try to bring up 2 cameras at the same time.

Is it possible to run serial_a and serial_b at the same time?

Is there a example device tree with 4 cameras using 2 Lane MIPI configuration?

Our Device Tree:

/ {
	tegra-capture-vi  {
		num-channels = <4>;
		ports {
			#address-cells = <1>;
			#size-cells = <0>;
			vi_port0: port@0 {
				reg = <0>;
				liar0234_vi_in0: endpoint {
					port-index = <0>;
					bus-width = <2>;
					remote-endpoint = <&liar0234_csi_out0>;
				};
			};
			vi_port1: port@1 {
				reg = <1>;
				liar0234_vi_in1: endpoint {
					port-index = <1>;
					bus-width = <2>;
					remote-endpoint = <&liar0234_csi_out1>;
				};
			};
			vi_port2: port@2 {
				reg = <2>;
				liar0234_vi_in2: endpoint {
					port-index = <2>;
					bus-width = <2>;
					remote-endpoint = <&liar0234_csi_out2>;
				};
			};
			vi_port3: port@3 {
				reg = <3>;
				liar0234_vi_in3: endpoint {
					port-index = <3>;
					bus-width = <2>;
					remote-endpoint = <&liar0234_csi_out3>;
				};
			};
		};
	};

	host1x@13e00000 {
		nvcsi@15a00000 {
			num-channels = <4>;
			#address-cells = <1>;
			#size-cells = <0>;
			csi_chan0: channel@0 {
				reg = <0>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liar0234_csi_in0: endpoint@0 {
							port-index = <0>;
							bus-width = <2>;
							remote-endpoint = <&liar0234_ar0234_out0>;
						};
					};
					port@1 {
						reg = <1>;
						liar0234_csi_out0: endpoint@1 {
							remote-endpoint = <&liar0234_vi_in0>;
						};
					};
				};
			};
			csi_chan1: channel@1 {
				reg = <1>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liar0234_csi_in1: endpoint@0 {
							port-index = <1>;
							bus-width = <2>;
							remote-endpoint = <&liar0234_ar0234_out1>;
						};
					};
					port@1 {
						reg = <1>;
						liar0234_csi_out1: endpoint@1 {
							remote-endpoint = <&liar0234_vi_in1>;
						};
					};
				};
			};
			csi_chan2: channel@2 {
				reg = <2>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liar0234_csi_in2: endpoint@0 {
							port-index = <2>;
							bus-width = <2>;
							remote-endpoint = <&liar0234_ar0234_out2>;
						};
					};
					port@1 {
						reg = <1>;
						liar0234_csi_out2: endpoint@1 {
							remote-endpoint = <&liar0234_vi_in2>;
						};
					};
				};
			};
			csi_chan3: channel@3 {
				reg = <3>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					port@0 {
						reg = <0>;
						liar0234_csi_in3: endpoint@0 {
							port-index = <3>;
							bus-width = <2>;
							remote-endpoint = <&liar0234_ar0234_out3>;
						};
					};
					port@1 {
						reg = <1>;
						liar0234_csi_out3: endpoint@1 {
							remote-endpoint = <&liar0234_vi_in3>;
						};
					};
				};
			};
		};
	};


	i2c@3180000 {
		tca9546@70 {
			i2c@0 {
				ar0234_cam1: ar0234_b@18 {
					compatible = "nvidia,ar0234";
					/* I2C device address */
					reg = <0x18>;

					/* Input clock name */
					mclk = "extperiph1";

					/* V4L2 device node location ATTENTION has no effect! Devnotes are given by invoke sequence */
 					devnode = "video0";

					/* Physical dimensions of sensor */
					physical_w = "9.995";
					physical_h = "5.595";

					sensor_model ="ar0234";
					use_decibel_gain = "true";

					/* enable CID_SENSOR_MODE_ID for sensor modes selection */
					use_sensor_mode_id = "true";

					/* NOTE specifie the sensor id, valid values 0-3. used at ar0234 driver to access correct struct */
					sensor_id = "1";

					mode0 { /*30 FPS*/
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_c";
						phy_mode = "DPHY";
						discontinuous_clk = "yes";
						dpcm_enable = "false";
						cil_settletime = "130";				/* k.w modified NOTE THS-Settle measured at MIPI clock signal, see Understanding_and_Performing_MIPI.pdf  */
						lane_polarity = "3";

						csi_pixel_bit_depth = "10";
						mode_type = "bayer";
						pixel_phase = "grbg";

						active_w = "1920";
						active_h = "1200";
						readout_orientation = "0";
						line_length = "612"; // "2448";		/* k.w modified NOTE value from registar wizard 0x300C */
						inherent_gain = "1";
						pix_clk_hz = "300000000"; 			/* k.w modified NOTE min val 100000000 */

						min_hdr_ratio = "1";   				/* k.w modified NOTE only used for HDR sensor */
						max_hdr_ratio = "1";	 			/* k.w modified NOTE only used for HDR sensor */

						gain_factor = "100";
						min_gain_val = "170";
						max_gain_val = "1600";
						step_gain_val = "2";
						default_gain = "200";

						framerate_factor = "1000000";
						min_framerate = "10000000";
						max_framerate = "30000000";
						step_framerate = "1";
						default_framerate= "10000000";

						exposure_factor = "1000000";
						min_exp_time = "20";    			/* 20 us */
						max_exp_time = "33333"; 			/* 33333 us */
						step_exp_time = "2";  				/* k.w modified NOTE only even values are allowed */
						default_exp_time = "8330"; 			/* 8330 us */

						embedded_metadata_height = "0";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;
						port@0 {
							reg = <0>;
							liar0234_ar0234_out2: endpoint {
								port-index = <2>;
								bus-width = <2>;
								remote-endpoint = <&liar0234_csi_in2>;
							};
						};
					};
				};
			};
			i2c@1 {
				ar0234_cam0: ar0234_a@18 {
					compatible = "nvidia,ar0234";
					/* I2C device address */
					reg = <0x18>;

					/* Input clock name */
					mclk = "extperiph1";

					/* V4L2 device node location ATTENTION has no effect! Devnotes are given by invoke sequence */
 					devnode = "video1";

					/* Physical dimensions of sensor */
					physical_w = "9.995";
					physical_h = "5.595";

					sensor_model ="ar0234";
					use_decibel_gain = "true";

					/* Define any required hw resources needed by driver */
					/* ie. clocks, io pins, power sources */
					//avdd-reg = "vana";
					//iovdd-reg = "vif";
					//dvdd-reg = "vdig";

					/* Defines number of frames to be dropped by driver internally after applying
					sensor crop settings. Some sensors send corrupt frames after applying
					crop co-ordinates */
					//post_crop_frame_drop = "0";*/

					/* if true, delay gain setting by one frame to be in sync with exposure */
					//delayed_gain = "true";

					/* enable CID_SENSOR_MODE_ID for sensor modes selection */
					use_sensor_mode_id = "true";

					/* NOTE specifie the sensor id, valid values 0-3. used at ar0234 driver to access correct struct */
					sensor_id = "0";

					/**
					* ==== Modes ====
					* A modeX node is required to support v4l2 driver
					* implementation with NVIDIA camera software stack
					*
					* == Signal properties ==
					*
					* phy_mode = "";
					* PHY mode used by the MIPI lanes for this device
					*
					* tegra_sinterface = "";
					* CSI Serial interface connected to tegra
					* Incase of virtual HW devices, use virtual
					* For SW emulated devices, use host
					*
					* pix_clk_hz = "";
					* Sensor pixel clock used for calculations like exposure and framerate
					* NOTE evalueted with measurement of pixel-Clock and adjust value until it is correct set to 250MHz
					*
					* readout_orientation = "0";
					* Based on camera module orientation.
					* Only change readout_orientation if you specifically
					* Program a different readout order for this mode
					*
					* lane_polarity
					* Based on the camera connector pin.
					* CSIx_D0 | CSIx_D1 | CSI(X+1)_D0 | CSI(X+1)CSIx_D1
					*    LSB  |   BIT1  |     BIT2    |      MSB
					* if there is a polarity swap on any lane, the bit corrsponding
					* to the lane should be set
					* e.g. polarity swap on CSIx_D0 only -> lane_polarity = "1"; 0001
					* e.g. polarity swap on CSIx_D1 and CSI(X+1)_D0 -> lane_polarity = "6"; 0110
					*
					* == Image format Properties ==
					*
					* active_w = "";
					* Pixel active region width
					*
					* active_h = "";
					* Pixel active region height
					*
					* pixel_t = "";
					* The sensor readout pixel pattern
					*
					* line_length = "";
					* Pixel line length (width) for sensor mode.
					*
					* == Source Control Settings ==
					*
					* Gain factor used to convert fixed point integer to float
					* Gain range [min_gain/gain_factor, max_gain/gain_factor]
					* Gain step [step_gain/gain_factor is the smallest step that can be configured]
					* Default gain [Default gain to be initialized for the control.
					*     use min_gain_val as default for optimal results]
					* Framerate factor used to convert fixed point integer to float
					* Framerate range [min_framerate/framerate_factor, max_framerate/framerate_factor]
					* Framerate step [step_framerate/framerate_factor is the smallest step that can be configured]
					* Default Framerate [Default framerate to be initialized for the control.
					*     use max_framerate to get required performance]
					* Exposure factor used to convert fixed point integer to float
					* For convenience use 1 sec = 1000000us as conversion factor
					* Exposure range [min_exp_time/exposure_factor, max_exp_time/exposure_factor]
					* Exposure step [step_exp_time/exposure_factor is the smallest step that can be configured]
					* Default Exposure Time [Default exposure to be initialized for the control.
					*     Set default exposure based on the default_framerate for optimal exposure settings]
					*
					* gain_factor = ""; (integer factor used for floating to fixed point conversion)
					* min_gain_val = ""; (ceil to integer)
					* max_gain_val = ""; (ceil to integer)
					* step_gain_val = ""; (ceil to integer)
					* default_gain = ""; (ceil to integer)
					* Gain limits for mode
					*
					* exposure_factor = ""; (integer factor used for floating to fixed point conversion)
					* min_exp_time = ""; (ceil to integer)
					* max_exp_time = ""; (ceil to integer)
					* step_exp_time = ""; (ceil to integer)
					* default_exp_time = ""; (ceil to integer)
					* Exposure Time limits for mode (sec)
					*
					* framerate_factor = ""; (integer factor used for floating to fixed point conversion)
					* min_framerate = ""; (ceil to integer)
					* max_framerate = ""; (ceil to integer)
					* step_framerate = ""; (ceil to integer)
					* default_framerate = ""; (ceil to integer)
					* Framerate limits for mode (fps)
					*
					* embedded_metadata_height = "";
					* Sensor embedded metadata height in units of rows.
					* If sensor does not support embedded metadata value should be 0.
					*/
					mode0 { /*30 FPS*/
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_d";
						phy_mode = "DPHY";
						discontinuous_clk = "yes";
						dpcm_enable = "false";
						cil_settletime = "130";				/* k.w modified NOTE THS-Settle measured at MIPI clock signal, see Understanding_and_Performing_MIPI.pdf  */
						lane_polarity = "12";

						csi_pixel_bit_depth = "10";
						mode_type = "bayer";
						pixel_phase = "grbg";

						active_w = "1920";
						active_h = "1200";
						readout_orientation = "0";
						line_length = "612"; // "2448";		/* k.w modified NOTE value from registar wizard 0x300C */
						inherent_gain = "1";
						pix_clk_hz = "300000000"; 			/* k.w modified NOTE min val 100000000 */

						min_hdr_ratio = "1";   				/* k.w modified NOTE only used for HDR sensor */
						max_hdr_ratio = "1";	 			/* k.w modified NOTE only used for HDR sensor */

						gain_factor = "100";
						min_gain_val = "170";
						max_gain_val = "1600";
						step_gain_val = "2";
						default_gain = "200";

						framerate_factor = "1000000";
						min_framerate = "10000000";
						max_framerate = "30000000";
						step_framerate = "1";
						default_framerate= "10000000";

						exposure_factor = "1000000";
						min_exp_time = "20";    			/* 20 us */
						max_exp_time = "33333"; 			/* 33333 us */
						step_exp_time = "2";  				/* k.w modified NOTE only even values are allowed */
						default_exp_time = "8330"; 			/* 8330 us */

						embedded_metadata_height = "0";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;
						port@0 {
							reg = <0>;
							liar0234_ar0234_out3: endpoint {
								port-index = <3>;
								bus-width = <2>;
								remote-endpoint = <&liar0234_csi_in3>;
							};
						};
					};
				};
			};
			i2c@2 {
				ar0234_cam2: ar0234_c@18 {
					compatible = "nvidia,ar0234";
					/* I2C device address */
					reg = <0x18>;

					/* Input clock name */
					mclk = "extperiph1";

					/* V4L2 device node location */
					devnode = "video2";

					/* Physical dimensions of sensor */
					physical_w = "9.995";
					physical_h = "5.595";

					sensor_model ="ar0234";
					use_decibel_gain = "true";

					/* enable CID_SENSOR_MODE_ID for sensor modes selection */
					use_sensor_mode_id = "true";

					/* NOTE specifie the sensor id, valid values 0-3. used at ar0234 driver to access correct struct */
					sensor_id = "2";

					mode0 { /*30 FPS*/
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_a";
						phy_mode = "DPHY";
						discontinuous_clk = "yes";
						dpcm_enable = "false";
						cil_settletime = "130";				/* k.w modified NOTE THS-Settle measured at MIPI clock signal, see Understanding_and_Performing_MIPI.pdf  */
						lane_polarity = "1";

						csi_pixel_bit_depth = "10";
						mode_type = "bayer";
						pixel_phase = "grbg";

						active_w = "1920";
						active_h = "1200";
						readout_orientation = "0";
						line_length = "612"; // "2448";		/* k.w modified NOTE value from registar wizard 0x300C */
						inherent_gain = "1";
						pix_clk_hz = "300000000"; 			/* k.w modified NOTE min val 100000000 */

						min_hdr_ratio = "1";   				/* k.w modified NOTE only used for HDR sensor */
						max_hdr_ratio = "1";	 			/* k.w modified NOTE only used for HDR sensor */

						gain_factor = "100";
						min_gain_val = "170";
						max_gain_val = "1600";
						step_gain_val = "2";
						default_gain = "200";

						framerate_factor = "1000000";
						min_framerate = "10000000";
						max_framerate = "30000000";
						step_framerate = "1";
						default_framerate= "10000000";

						exposure_factor = "1000000";
						min_exp_time = "20";    			/* 20 us */
						max_exp_time = "33333"; 			/* 33333 us */
						step_exp_time = "2";  				/* k.w modified NOTE only even values are allowed */
						default_exp_time = "8330"; 			/* 8330 us */

						embedded_metadata_height = "0";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;
						port@0 {
							reg = <0>;
							liar0234_ar0234_out0: endpoint {
								port-index = <0>;
								bus-width = <2>;
								remote-endpoint = <&liar0234_csi_in0>;
							};
						};
					};
				};
			};
			i2c@3 {
				ar0234_cam3: ar0234_d@18 {
					compatible = "nvidia,ar0234";
					/* I2C device address */
					reg = <0x18>;

					/* Input clock name */
					mclk = "extperiph1";

					/* V4L2 device node location */
					devnode = "video3";

					/* Physical dimensions of sensor */
					physical_w = "9.995";
					physical_h = "5.595";

					sensor_model ="ar0234";
					use_decibel_gain = "true";

					/* enable CID_SENSOR_MODE_ID for sensor modes selection */
					use_sensor_mode_id = "true";

					/* NOTE specifie the sensor id, valid values 0-3. used at ar0234 driver to access correct struct */
					sensor_id = "3";

					mode0 { /*30 FPS*/
						mclk_khz = "24000";
						num_lanes = "2";
						tegra_sinterface = "serial_b";
						phy_mode = "DPHY";
						discontinuous_clk = "yes";
						dpcm_enable = "false";
						cil_settletime = "130";				/* k.w modified NOTE THS-Settle measured at MIPI clock signal, see Understanding_and_Performing_MIPI.pdf  */
						lane_polarity = "8";

						csi_pixel_bit_depth = "10";
						mode_type = "bayer";
						pixel_phase = "grbg";

						active_w = "1920";
						active_h = "1200";
						readout_orientation = "0";
						line_length = "612"; // "2448";		/* k.w modified NOTE value from registar wizard 0x300C */
						inherent_gain = "1";
						pix_clk_hz = "300000000"; 			/* k.w modified NOTE min val 100000000 */

						min_hdr_ratio = "1";   				/* k.w modified NOTE only used for HDR sensor */
						max_hdr_ratio = "1";	 			/* k.w modified NOTE only used for HDR sensor */

						gain_factor = "100";
						min_gain_val = "170";
						max_gain_val = "1600";
						step_gain_val = "2";
						default_gain = "200";

						framerate_factor = "1000000";
						min_framerate = "10000000";
						max_framerate = "30000000";
						step_framerate = "1";
						default_framerate= "10000000";

						exposure_factor = "1000000";
						min_exp_time = "20";    			/* 20 us */
						max_exp_time = "33333"; 			/* 33333 us */
						step_exp_time = "2";  				/* k.w modified NOTE only even values are allowed */
						default_exp_time = "8330"; 			/* 8330 us */

						embedded_metadata_height = "0";
					};
					ports {
						#address-cells = <1>;
						#size-cells = <0>;
						port@0 {
							reg = <0>;
							liar0234_ar0234_out1: endpoint {
								port-index = <1>;
								bus-width = <2>;
								remote-endpoint = <&liar0234_csi_in1>;
							};
						};
					};
				};
			};
		};
	};
};

/ {

	tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		/**
		* Physical settings to calculate max ISO BW
		*
		* num_csi_lanes = <>;
		* Total number of CSI lanes when all cameras are active
		*
		* max_lane_speed = <>;
		* Max lane speed in Kbit/s
		*
		* min_bits_per_pixel = <>;
		* Min bits per pixel
		*
		* vi_peak_byte_per_pixel = <>;
		* Max byte per pixel for the VI ISO case
		*
		* vi_bw_margin_pct = <>;
		* Vi bandwidth margin in percentage
		*
		* max_pixel_rate = <>;
		* Max pixel rate in Kpixel/s for the ISP ISO case
		* Set this to the highest pix_clk_hz out of all available modes in kHz. NOTE k.w modified
		*
		* isp_peak_byte_per_pixel = <>;
		* Max byte per pixel for the ISP ISO case
		*
		* isp_bw_margin_pct = <>;
		* Isp bandwidth margin in percentage
		*/
		num_csi_lanes = <8>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <2>;
		vi_bw_margin_pct = <25>;
		max_pixel_rate = <750000>;
		isp_peak_byte_per_pixel = <5>;
		isp_bw_margin_pct = <25>;

		/**
		 * The general guideline for naming badge_info contains 3 parts, and is as follows,
		 * The first part is the camera_board_id for the module; if the module is in a FFD
		 * platform, then use the platform name for this part.
		 * The second part contains the position of the module, ex. "rear" or "front".
		 * NOTE k.w Four camera setup see https://forums.developer.nvidia.com/t/xavier-multiple-camera-connection-probelms/69753/19
		 * The third part contains the last 6 characters of a part number which is found
		 * in the module's specsheet from the vender.
		 *
		 * ISP Configs available and testet:
		 * - liar0234 (Leopardimage)
		 * - A6V26
		 * - RPB194
		 * - RBPCV3
		 * - RBP234
		 * The best ISP configuration mode is RBP234 for Monochrome and RGB sensors
		 */
		modules {
			module0 {
				badge = "ar0234_topleft_RBP234";
				position = "topleft";

				orientation = "0";  		/* k.w modified */
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ar0234 30-0018";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9546@70/i2c@0/ar0234_b@18";
				};
			};
			module1 {
				badge = "ar0234_topright_RBP234";
				position = "topright";

				orientation = "0";  		/* k.w modified */
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ar0234 31-0018";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9546@70/i2c@1/ar0234_a@18";
				};
			};
			module2 {
				badge = "ar0234_centerleft_RBP234";
				position = "centerleft";

				orientation = "0";  		/* k.w modified */
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ar0234 32-0018";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9546@70/i2c@2/ar0234_c@18";
				};
			};
			module3 {
				badge = "ar0234_centerright_RBP234";
				position = "centerright";

				orientation = "0";  		/* k.w modified */
				drivernode0 {
					/* Declare PCL support driver (classically known as guid)  */
					pcl_id = "v4l2_sensor";
					/* Driver v4l2 device name */
					devname = "ar0234 33-0018";
					/* Declare the device-tree hierarchy to driver instance */
					proc-device-tree = "/proc/device-tree/i2c@3180000/tca9546@70/i2c@3/ar0234_d@18";
				};
			};
		};
	};
};
1 Like
7

hello knezevic,

it’s CSI0 D1 and CSI1 D0 P/N will always been swizzled for P/N.
could you please double check lane_polarity to configure a polarity swap on any lane.

besides,
how about running below to disable preview and shows frame-rate only for each camera separately?
for example,
$ gst-launch-1.0 nvarguscamerasrc sensor-id=X ! 'video/x-raw(memory:NVMM),width=1920, height=1080, framerate=30/1, format=NV12' ! nvvidconv ! 'video/x-raw(memory:NVMM),format=I420' ! fpsdisplaysink text-overlay=0 video-sink=fakesink sync=0 -v

8

Hello JerryChang

lane_polarity is ok, all 4 cameras are working correctly with your provided gstreamer pipeline.

I dont know if u missed my previous post (i did 2 posts in a row).
Can you please answer us the following question (as explained in the previous post):
Is it possible to run serial_a and serial_b at the same time?

Kind Regards
Knezevic

9

hello knezevic,

it’s able to run both CSI serial_a and serial_b at the same time.
also, you may review your gst commands since you’re able to launch all 4 cameras with simplified pipeline to disable preview and shows frame-rate separately.

10

Hello JerryChang

Thanks for the response.

As I have mentioned in a previous post:
After further testing I found out that camera on tegra_sinterface = “serial_a” and on tegra_sinterface = “serial_b” can not run at the same time. Same applies to tegra_sinterface = “serial_c” and tegra_sinterface = “serial_d”.

Using the following Pipeline:

$ gst-launch-1.0 nvarguscamerasrc sensor-id=X ! 'video/x-raw(memory:NVMM),width=1920, height=1080, framerate=30/1, format=NV12' ! nvvidconv ! 'video/x-raw(memory:NVMM),format=I420' ! fpsdisplaysink text-overlay=0 video-sink=fakesink sync=0 -v

Works perfectly fine if i run only 1 pipeline (using video 0-3) at the same time, however:

It does not work if i run the pipeline in 2 seperate terminals with sensor-id=0 and sensor-id=1 at the same time.
Same applies to running sensor-id=2 and sensor-id=3 at the same time.
When starting the 2nd pipeline, I get the error:
Error generated. /dvs/git/dirty/git-master_linux/multimedia/nvgstreamer/gst-nvarguscamera/gstnvarguscamerasrc.cpp, execute:762 Failed to create CaptureSession
However, running for example sensor-id=0 and sensor-id=2 does work.

Further logs in the syslog show:

gst-launch-1.0[1869]: Connection established (FFFF0E7F8900)=== gst-launch-1.0[1869]: CameraProvider initialized (0xfffef4000df0)SCF: Error BadParameter:  (propagating from src/services/capture/FusaCaptureViCsiHw.cpp, function openViCsi(), line 390)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: SCF: Error BadParameter:  (propagating from src/services/capture/CaptureServiceDeviceViCsi.cpp, function open(), line 336)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: SCF: Error BadParameter:  (propagating from src/services/capture/CaptureServiceDevice.cpp, function openSource(), line 398)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: SCF: Error BadParameter:  (propagating from src/services/capture/CaptureService.cpp, function openSource(), line 501)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: SCF: Error BadParameter:  (propagating from src/api/Session.cpp, function initialize(), line 294)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: SCF: Error BadParameter:  (propagating from src/api/CameraDriver.cpp, function createSession(), line 645)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: (Argus) Error BadParameter:  (propagating from src/api/CaptureSessionImpl.cpp, function initialize(), line 177)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: (Argus) Error BadParameter:  (propagating from src/api/CameraProviderImpl.cpp, function createCaptureSessionInternal(), line 305)
Mar 27 18:11:25 tegra-ubuntu nvargus-daemon[1717]: (Argus) Error InvalidState: Element not found (in /dvs/git/dirty/git-master_linux/camera/utils/nvcamerautils/inc/Vector.h, function remove(), line 172)

I assume the problem might be a wrong configuration in the device tree.
Is there a example device tree with 4 cameras using 2 Lane MIPI configuration?
I have posted our device tree in a previous post. Would highly appriciate if you could have a look at it.

Kind regards
Knezevic

11

hello knezevic,

I’ve checked your device tree sources, port bindings looks correct.

here’s reference driver that demonstrate six 2-lane camera.
for instance, $public_sources/kernel_src/hardware/nvidia/platform/t23x/common/kernel-dts/t234-common-modules/tegra234-camera-e3333-a00.dtsi

may I double confirm the L4T release version you’re working with.
please check whether you’ve below changes included to revise the symbol of nvcsi.

diff --git a/cvb/tegra234-p3768-0000-a0.dtsi b/cvb/tegra234-p3768-0000-a0.dtsi
index 29edde2..95d7375 100644
--- a/cvb/tegra234-p3768-0000-a0.dtsi
+++ b/cvb/tegra234-p3768-0000-a0.dtsi
@@ -277,7 +277,7 @@

        host1x@13e00000 {
                nvcsi@15a00000 {
-                       csi_chan0 {
+                       channel@0 {
12

Hi JerryChang

I’m a work colleague of knezevic.

Couldn’t find a difference while comparing our device tree and the device tree of $public_sources/kernel_src/hardware/nvidia/platform/t23x/common/kernel-dts/t234-common-modules/tegra234-camera-e3333-a00.dtsi.

We also adopted the device tree with the above patch, but that didn’t solve our problem:

diff --git a/cvb/tegra234-p3768-0000-a0.dtsi b/cvb/tegra234-p3768-0000-a0.dtsi
index 29edde2..95d7375 100644
--- a/cvb/tegra234-p3768-0000-a0.dtsi
+++ b/cvb/tegra234-p3768-0000-a0.dtsi
@@ -277,7 +277,7 @@

        host1x@13e00000 {
                nvcsi@15a00000 {
-                       csi_chan0 {
+                       channel@0 {

We use L4T release l4t_35.4.

We see the same behavior when we run two pipeline for one camera on two terminals like:

Terminal 1:

gst-launch-1.0 -v nvarguscamerasrc sensor-id=3 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! nvvidconv flip-method=0 ! fakesink

Terminal 12

gst-launch-1.0 -v nvarguscamerasrc sensor-id=2 ! ‘video/x-raw(memory:NVMM), width=(int)1920, height=(int)1080, format=(string)NV12, framerate=(fraction)30/1’ ! nvvidconv flip-method=0 ! fakesink

The Gstreamer error is:

Error generated. /dvs/git/dirty/git-master_linux/multimedia/nvgstreamer/gst-nvarguscamera/gstnvarguscamerasrc.cpp, execute:762 Failed to create CaptureSession
Got EOS from element "pipeline0".
Execution ended after 0:00:00.003900768

If we do the same for example with sensor_id=3 (serial_d) and sensor_id=1 (serial_b) than both sensors are streaming. Here is a matrix to present the behavior when running two sensors at the same time:

serial_a & serial_b -> Fail
serial_a & serial_c -> Successful 
serial_a & serial_d -> Successful 
serial_b & serial_c -> Successful
serial_b & serial_d -> Successful
serial_c & serial_d -> Fail

Do you have any other suggestions why we are not able to run serial_a/serial_b and serial_c/serial_d at the same time?

Thanks for helping us…

13

hello wyss,

please note that, sensor-id=X did not mapping to the /dev/videoX directly.
it’s actually looking for position property within tegra-camera-platform{}.
since you’ve four cameras in your system,
you may refer to six-cam settings, and using the first four properties for your implementation.
such as… bottomleft, bottomright, centerleft, and centerright.

if the issue persist, please disassembler the dtb file into text file for examination.
for instance, $ dtc -I dtb -O dts -o temp.txt tegra234-xxx.dtb

14

Hi JerryChang

Thanks for the response.

We assigned the positions according to the tegra-capture-vi:X from the output of v4l2-ctl --list-devices :

  • tegra-capture-vi0: bottomleft
  • tegra-capture-vi1: bottomright
  • tegra-capture-vi2: centerleft
  • tegra-capture-vi3: centerright

And the positions according to the /dev/videoX from the output of v4l2-ctl --list-devices :

  • /dev/video0: bottomleft
  • /dev/video1: bottomright
  • /dev/video2: centerleft
  • /dev/video3: centerright

Both tests failed.

Output of v4l2-ctl --list-devices:

NVIDIA Tegra Video Input Device (platform:tegra-camrtc-ca):
	/dev/media0

vi-output, ar0234 32-0018 (platform:tegra-capture-vi:0):
	/dev/video2

vi-output, ar0234 33-0018 (platform:tegra-capture-vi:1):
	/dev/video3

vi-output, ar0234 30-0018 (platform:tegra-capture-vi:2):
	/dev/video0

vi-output, ar0234 31-0018 (platform:tegra-capture-vi:3):
	/dev/video1

Here is our de-compiled device tree.
kernel_tegra234-p3767-0000-custom-0000-a0.dtb.txt (264.7 KB)

Thanks a lot for review our DT and helping us to get rid of this behavior.

BR
Kris

15

hello wyss,

port bindings looks correct.
it may incorrect GPIO toggling to cause such failure.
please see-also Jetson Orin NX Series and Orin Nano Series Design Guide for the [Table 10-2. Orin Module Camera Miscellaneous Pin Descriptions] to check the recommended usages.
and, please also refer to [Figure 10-1. CSI 2-Lane Connection Options] to review the assignments.

16

Hi JerryChang

We have a custom board and using CAM0_MCLK for all cameras. We use diffrent PowerDown GPIO than reported at Jetson Orin NX Series and Jetson Orin Nano Series. Our PowerDown pins are connected with the reset GPIO of the image sensor and we use the following pins:

DT extract:

#include "tegra234-camera-ar0234-a00.dtsi"
#include "dt-bindings/clock/tegra234-clock.h"

#define CAM0_RESET	TEGRA234_MAIN_GPIO(A, 6)    // Pin 222
#define CAM1_RESET	TEGRA234_MAIN_GPIO(I, 1)	// Pin 195
#define CAM2_RESET	TEGRA234_MAIN_GPIO(AC, 0)	// Pin 120
#define CAM3_RESET	TEGRA234_MAIN_GPIO(H, 6)    // Pin 141

#define CAMERA_I2C_MUX_BUS(x) (0x1E + x)

/ {
	i2c@3180000 {
		status = "okay";
		tca9546@70 {
			status = "okay";
			compatible = "nxp,pca9546";
			reg = <0x70>;
			#address-cells = <1>;
			#size-cells = <0>;
 			skip_mux_detect = "yes";
  			force_bus_start = <CAMERA_I2C_MUX_BUS(0)>;

			i2c@0 {
				status = "okay";
				reg = <0>;
				i2c-mux,deselect-on-exit;
				#address-cells = <1>;
				#size-cells = <0>;
				ar0234_b@18 {
					/* Define any required hw resources needed by driver */
					/* ie. clocks, io pins, power sources */
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
							<&bpmp_clks TEGRA234_CLK_EXTPERIPH1>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					reset-gpios = <&tegra_main_gpio CAM1_RESET GPIO_ACTIVE_HIGH>;
				};
			};
			i2c@1 {
				status = "okay";
				reg = <1>;
				i2c-mux,deselect-on-exit;
				#address-cells = <1>;
				#size-cells = <0>;
				ar0234_a@18 {
					/* Define any required hw resources needed by driver */
					/* ie. clocks, io pins, power sources */
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
							<&bpmp_clks TEGRA234_CLK_EXTPERIPH1>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					reset-gpios = <&tegra_main_gpio CAM0_RESET GPIO_ACTIVE_HIGH>;
				};
			};
			i2c@2 {
				status = "okay";
				reg = <2>;
				i2c-mux,deselect-on-exit;
				#address-cells = <1>;
				#size-cells = <0>;
				ar0234_c@18 {
					/* Define any required hw resources needed by driver */
					/* ie. clocks, io pins, power sources */
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
							<&bpmp_clks TEGRA234_CLK_EXTPERIPH1>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					reset-gpios = <&tegra_main_gpio CAM2_RESET GPIO_ACTIVE_HIGH>;
				};
			};
			i2c@3 {
				status = "okay";
				reg = <3>;
				i2c-mux,deselect-on-exit;
				#address-cells = <1>;
				#size-cells = <0>;
				ar0234_d@18 {
					/* Define any required hw resources needed by driver */
					/* ie. clocks, io pins, power sources */
					clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>,
							<&bpmp_clks TEGRA234_CLK_EXTPERIPH1>;
					clock-names = "extperiph1", "pllp_grtba";
					mclk = "extperiph1";
					reset-gpios = <&tegra_main_gpio CAM3_RESET GPIO_ACTIVE_HIGH>;
				};
			};
		};
	};

	gpio@6000d000 {
		camera-control-output-low {
			gpio-hog;
			output-low;
			gpios = <CAM0_RESET 0 CAM1_RESET 0 CAM2_RESET 0 CAM3_RESET 0>;
			label = "cam0-rst","cam1-rst","cam2-rst","cam3-rst";
		};
	};
};

But I guess that this behavior has nothing to do with GPIO toggling because the specific ar0234 kernel driver instance power_on function isn’t called, that is verified with dmesg logs. The gst pipline does crash before. The crash appears at createCaptureSession from nvargus daemon. We tried to find the source code of createCaptureSession function for further debugging but couldn’t find it. We guess the code is not open source.

The error output of nvargus daemon from /var/log/syslog is:

Mar 27 17:54:53 tegra-ubuntu nvargus-daemon: Module_id 30 Severity 2 : (fusa) Error: BadParameter  propagating from:/capture/src/fusaCsiStreamHandler.cpp 248
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon: Module_id 30 Severity 2 : (fusa) Error: BadParameter  propagating from:/capture/src/fusaViHandler.cpp 328
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon: Module_id 30 Severity 2 : (fusa) Error: BadParameter  propagating from:/capture/src/fusaViHandler.cpp 124
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon: Module_id 30 Severity 2 : (fusa) Error: BadParameter  propagating from:/capture/src/core.cpp 76
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: === gst-launch-1.0[1798]: Connection established (FFFF471F0900)=== gst-launch-1.0[1798]: CameraProvider initialized (0xffff10000c20)SCF: Error BadParameter:  (propagating from src/services/capture/FusaCaptureViCsiHw.cpp, function openViCsi(), line 390)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: SCF: Error BadParameter:  (propagating from src/services/capture/CaptureServiceDeviceViCsi.cpp, function open(), line 336)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: SCF: Error BadParameter:  (propagating from src/services/capture/CaptureServiceDevice.cpp, function openSource(), line 398)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: SCF: Error BadParameter:  (propagating from src/services/capture/CaptureService.cpp, function openSource(), line 501)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: SCF: Error BadParameter:  (propagating from src/api/Session.cpp, function initialize(), line 294)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: SCF: Error BadParameter:  (propagating from src/api/CameraDriver.cpp, function createSession(), line 645)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: (Argus) Error BadParameter:  (propagating from src/api/CaptureSessionImpl.cpp, function initialize(), line 177)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: (Argus) Error BadParameter:  (propagating from src/api/CameraProviderImpl.cpp, function createCaptureSessionInternal(), line 305)
Mar 27 17:54:53 tegra-ubuntu nvargus-daemon[1390]: (Argus) Error InvalidState: Element not found (in /dvs/git/dirty/git-master_linux/camera/utils/nvcamerautils/inc/Vector.h, function remove(), line 172)

GST Error is:

Error generated. /dvs/git/dirty/git-master_linux/multimedia/nvgstreamer/gst-nvarguscamera/gstnvarguscamerasrc.cpp, execute:762 Failed to create CaptureSession

Can you provide further debugging tools/ideas? Or any other suggestions?

Thanks for helping us.

BR
Kris

17

hello knezevic,

this failure is due to Argus cannot get the camera device correctly to create the capture session with the specified device.
if you dig further, there’s an error of openViCsi() of camera initialization.

let me have confirmation.
according to your previous comments…

did you meant all those 4-camera were running concurrently via v4l IOCTL?

18

you should visit Jetson Linux 35.4.1 page to download [Driver Package (BSP) Sources] package.
there’s gst-nvarguscamera_src.tbz2 tarball file to contain the sources.

as for previous comments.
this is due to an error of openViCsi() of camera initialization.

19

No. All cameras work fine if we let them run independently. BUT if they run concurrently with v4l2-ctrl the same behavior appears as mentioned in the post above:

I see something curious in the trace log. First starting 30-0018 (serial_c) and then starting 31-0018 (serial_d) then serial_d log shows cch:1 vi:1 and serial_c cch:0 vi:1 . It’s looks like they both use the same vi:1 port. Could that be the root cause? I checked with a oscilloscop that both image sensor are sending data.
Trace Log:

# tracer: nop
#
# entries-in-buffer/entries-written: 19526/19526   #P:8
#
#                                _-----=> irqs-off
#                               / _----=> need-resched
#                              | / _---=> hardirq/softirq
#                              || / _--=> preempt-depth
#                              ||| /     delay
#           TASK-PID     CPU#  ||||   TIMESTAMP  FUNCTION
#              | |         |   ||||      |         |
     kworker/1:1-55      [001] ....   584.651925: rtcpu_string: tstamp:18697629863 id:0x04010000 str:"VM0 deactivating."
        v4l2-ctl-1776    [005] ....   632.419285: tegra_channel_open: vi-output, ar0234 30-0018
        v4l2-ctl-1776    [005] ....   632.425424: tegra_channel_set_power: ar0234 30-0018 : 0x1
        v4l2-ctl-1776    [005] ....   632.425436: camera_common_s_power: status : 0x1
        v4l2-ctl-1776    [005] ....   632.439016: tegra_channel_set_power: 13e40000.host1x:nvcsi@15a00000- : 0x1
        v4l2-ctl-1776    [005] ....   632.439019: csi_s_power: enable : 0x1
        v4l2-ctl-1776    [005] ....   632.440547: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt c4
        v4l2-ctl-1776    [005] ....   632.449244: tegra_channel_set_stream: enable : 0x1
        v4l2-ctl-1776    [005] ....   632.482653: tegra_channel_set_stream: 13e40000.host1x:nvcsi@15a00000- : 0x1
        v4l2-ctl-1776    [005] ....   632.482656: csi_s_stream: enable : 0x1
        v4l2-ctl-1776    [005] ....   632.482968: tegra_channel_set_stream: ar0234 30-0018 : 0x1
     kworker/1:1-55      [001] ....   632.487597: rtcpu_string: tstamp:20192247329 id:0x04010000 str:"VM0 activating."
     kworker/1:1-55      [001] ....   632.487601: rtcpu_vinotify_event: tstamp:20192749587 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:646157203744 data:0x759e300010000000
     kworker/1:1-55      [001] ....   632.487601: rtcpu_vinotify_event: tstamp:20192749806 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:646157210208 data:0x0000000031000001
     kworker/1:1-55      [001] ....   632.487602: rtcpu_vinotify_event: tstamp:20192750061 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:646157255776 data:0x759e2d0010000000
     kworker/1:1-55      [001] ....   632.487602: rtcpu_vinotify_event: tstamp:20192750277 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:646157262336 data:0x0000000031000002
     kworker/1:1-55      [001] ....   633.103611: rtcpu_vinotify_event: tstamp:20212281064 cch:0 vi:1 tag:FS channel:0x00 frame:1 vi_tstamp:646782243744 data:0x0000000100000012
     kworker/1:1-55      [001] ....   633.103613: rtcpu_vinotify_event: tstamp:20212281202 cch:0 vi:1 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:646782243808 data:0x0000000800000000
     kworker/1:1-55      [001] ....   633.103614: rtcpu_vinotify_event: tstamp:20212281355 cch:0 vi:1 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:646782246400 data:0x0000000000000001
     kworker/1:1-55      [001] ....   633.103615: rtcpu_vinotify_event: tstamp:20212281486 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:646782285184 data:0x0000000008020001
 vi-output, ar02-1778    [001] ....   633.106809: tegra_channel_capture_frame: sof:646.782246400
 vi-output, ar02-1778    [001] ....   633.106810: tegra_channel_capture_frame: eof:646.814881440
     kworker/1:1-55      [001] ....   633.159762: rtcpu_vinotify_event: tstamp:20213366713 cch:0 vi:1 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:646814880416 data:0x0000000004af0002
     kworker/1:1-55      [001] ....   633.159764: rtcpu_vinotify_event: tstamp:20213366859 cch:0 vi:1 tag:FE channel:0x00 frame:1 vi_tstamp:646814881184 data:0x0000000100000022
     kworker/1:1-55      [001] ....   633.159764: rtcpu_vinotify_event: tstamp:20213367018 cch:0 vi:1 tag:ATOMP_FE channel:0x00 frame:1 vi_tstamp:646814881280 data:0x0000000800000000
     kworker/1:1-55      [001] ....   633.159764: rtcpu_vinotify_event: tstamp:20213367152 cch:0 vi:1 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:646814881440 data:0x0000000000000000
     kworker/1:1-55      [001] ....   633.159765: rtcpu_vinotify_event: tstamp:20213367306 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:646814933664 data:0x0000000002020001
     kworker/1:1-55      [001] ....   633.159766: rtcpu_vinotify_event: tstamp:20213367438 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:646814950112 data:0x0000000000020001
 vi-output, ar02-1778    [001] ....   633.206787: tegra_channel_capture_frame: sof:646.882233632
 vi-output, ar02-1778    [001] ....   633.206789: tegra_channel_capture_frame: eof:646.914868640
 .
 .
 .
 .
 .
 .
     kworker/1:1-55      [001] ....   644.639602: rtcpu_vinotify_event: tstamp:20572301598 cch:0 vi:1 tag:CHANSEL_PXL_EOF channel:0x23 frame:52 vi_tstamp:658313408416 data:0x0000000004af0002
     kworker/1:1-55      [001] ....   644.639603: rtcpu_vinotify_event: tstamp:20572301730 cch:0 vi:1 tag:FE channel:0x00 frame:52 vi_tstamp:658313409216 data:0x0000003400000022
     kworker/1:1-55      [001] ....   644.639603: rtcpu_vinotify_event: tstamp:20572301885 cch:0 vi:1 tag:ATOMP_FE channel:0x00 frame:52 vi_tstamp:658313409312 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.639604: rtcpu_vinotify_event: tstamp:20572302018 cch:0 vi:1 tag:ATOMP_FRAME_DONE channel:0x23 frame:52 vi_tstamp:658313409472 data:0x0000000000000000
     kworker/1:1-55      [001] ....   644.639604: rtcpu_vinotify_event: tstamp:20572798928 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:52 vi_tstamp:658313469920 data:0x0000000002020074
     kworker/1:1-55      [001] ....   644.639605: rtcpu_vinotify_event: tstamp:20572799063 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:52 vi_tstamp:658313486592 data:0x0000000000020074
     kworker/1:1-55      [001] ....   644.695761: rtcpu_vinotify_event: tstamp:20574427088 cch:0 vi:1 tag:FS channel:0x00 frame:53 vi_tstamp:658380758944 data:0x0000003500000012
     kworker/1:1-55      [001] ....   644.695764: rtcpu_vinotify_event: tstamp:20574427228 cch:0 vi:1 tag:ATOMP_FS channel:0x00 frame:53 vi_tstamp:658380759040 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.695764: rtcpu_vinotify_event: tstamp:20574427385 cch:0 vi:1 tag:CHANSEL_PXL_SOF channel:0x23 frame:53 vi_tstamp:658380761632 data:0x0000000000000001
     kworker/1:1-55      [001] ....   644.695765: rtcpu_vinotify_event: tstamp:20574427517 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:53 vi_tstamp:658380800416 data:0x0000000008020075
     kworker/1:1-55      [001] ....   644.695765: rtcpu_vinotify_event: tstamp:20574427669 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658381053984 data:0x759e2d0010000000
     kworker/1:1-55      [001] ....   644.695766: rtcpu_vinotify_event: tstamp:20574427801 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658381097312 data:0x0000000031000076
 vi-output, ar02-1778    [001] ....   644.705483: tegra_channel_capture_frame: sof:658.380761632
 vi-output, ar02-1778    [001] ....   644.705486: tegra_channel_capture_frame: eof:658.413396608
     kworker/1:1-55      [001] ....   644.751766: rtcpu_vinotify_event: tstamp:20575511743 cch:0 vi:1 tag:CHANSEL_PXL_EOF channel:0x23 frame:53 vi_tstamp:658413395616 data:0x0000000004af0002
     kworker/1:1-55      [001] ....   644.751769: rtcpu_vinotify_event: tstamp:20575511885 cch:0 vi:1 tag:FE channel:0x00 frame:53 vi_tstamp:658413396384 data:0x0000003500000022
     kworker/1:1-55      [001] ....   644.751769: rtcpu_vinotify_event: tstamp:20575512041 cch:0 vi:1 tag:ATOMP_FE channel:0x00 frame:53 vi_tstamp:658413396480 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.751770: rtcpu_vinotify_event: tstamp:20575512176 cch:0 vi:1 tag:ATOMP_FRAME_DONE channel:0x23 frame:53 vi_tstamp:658413396608 data:0x0000000000000000
     kworker/1:1-55      [001] ....   644.751770: rtcpu_vinotify_event: tstamp:20575512329 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:53 vi_tstamp:658413448896 data:0x0000000002020075
     kworker/1:1-55      [001] ....   644.751771: rtcpu_vinotify_event: tstamp:20575512464 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:53 vi_tstamp:658413465312 data:0x0000000000020075
 vi-output, ar02-1778    [001] ....   644.805472: tegra_channel_capture_frame: sof:658.480748800
 vi-output, ar02-1778    [001] ....   644.805476: tegra_channel_capture_frame: eof:658.513383840
     kworker/1:1-55      [001] ....   644.807607: rtcpu_vinotify_event: tstamp:20577531197 cch:0 vi:1 tag:FS channel:0x00 frame:54 vi_tstamp:658480746112 data:0x0000003600000012
     kworker/1:1-55      [001] ....   644.807608: rtcpu_vinotify_event: tstamp:20577531337 cch:0 vi:1 tag:ATOMP_FS channel:0x00 frame:54 vi_tstamp:658480746240 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.807608: rtcpu_vinotify_event: tstamp:20578061569 cch:0 vi:1 tag:CHANSEL_PXL_SOF channel:0x23 frame:54 vi_tstamp:658480748800 data:0x0000000000000001
     kworker/1:1-55      [001] ....   644.807609: rtcpu_vinotify_event: tstamp:20578061703 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:54 vi_tstamp:658480800096 data:0x0000000008020076
     kworker/1:1-55      [001] ....   644.807610: rtcpu_vinotify_event: tstamp:20578061853 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658481065504 data:0x759e300010000000
     kworker/1:1-55      [001] ....   644.807610: rtcpu_vinotify_event: tstamp:20578061984 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658481108800 data:0x0000000031000077
     kworker/1:1-55      [001] ....   644.807611: rtcpu_vinotify_event: tstamp:20578604102 cch:0 vi:1 tag:CHANSEL_PXL_EOF channel:0x23 frame:54 vi_tstamp:658513382816 data:0x0000000004af0002
     kworker/1:1-55      [001] ....   644.807612: rtcpu_vinotify_event: tstamp:20578604235 cch:0 vi:1 tag:FE channel:0x00 frame:54 vi_tstamp:658513383616 data:0x0000003600000022
     kworker/1:1-55      [001] ....   644.807612: rtcpu_vinotify_event: tstamp:20578604391 cch:0 vi:1 tag:ATOMP_FE channel:0x00 frame:54 vi_tstamp:658513383680 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.807613: rtcpu_vinotify_event: tstamp:20578604530 cch:0 vi:1 tag:ATOMP_FRAME_DONE channel:0x23 frame:54 vi_tstamp:658513383840 data:0x0000000000000000
     kworker/1:1-55      [001] ....   644.807614: rtcpu_vinotify_event: tstamp:20578604680 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:54 vi_tstamp:658513436096 data:0x0000000002020076
     kworker/1:1-55      [001] ....   644.807614: rtcpu_vinotify_event: tstamp:20578604811 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:54 vi_tstamp:658513452544 data:0x0000000000020076     
        v4l2-ctl-1791    [001] ....   644.879994: tegra_channel_open: vi-output, ar0234 31-0018
        v4l2-ctl-1791    [001] ....   644.884528: tegra_channel_set_power: ar0234 31-0018 : 0x1
        v4l2-ctl-1791    [001] ....   644.884537: camera_common_s_power: status : 0x1
        v4l2-ctl-1791    [003] ....   644.898036: tegra_channel_set_power: 13e40000.host1x:nvcsi@15a00000- : 0x1
        v4l2-ctl-1791    [003] ....   644.898039: csi_s_power: enable : 0x1
        v4l2-ctl-1791    [003] ....   644.898156: tegra_channel_capture_setup: vnc_id 0 W 1920 H 1200 fmt c4
        v4l2-ctl-1791    [001] ....   644.898854: tegra_channel_set_stream: enable : 0x1
        v4l2-ctl-1791    [001] ....   644.901201: tegra_channel_set_stream: 13e40000.host1x:nvcsi@15a00000- : 0x1
        v4l2-ctl-1791    [001] ....   644.901203: csi_s_stream: enable : 0x1
        v4l2-ctl-1791    [001] ....   644.901299: tegra_channel_set_stream: ar0234 31-0018 : 0x1
 vi-output, ar02-1778    [001] ....   644.905365: tegra_channel_capture_frame: sof:658.580736032
 vi-output, ar02-1778    [001] ....   644.905366: tegra_channel_capture_frame: eof:658.613371040
     kworker/1:1-55      [001] ....   644.919589: rtcpu_vinotify_event: tstamp:20580660463 cch:0 vi:1 tag:FS channel:0x00 frame:55 vi_tstamp:658580733344 data:0x0000003700000012
     kworker/1:1-55      [001] ....   644.919589: rtcpu_vinotify_event: tstamp:20580660603 cch:0 vi:1 tag:ATOMP_FS channel:0x00 frame:55 vi_tstamp:658580733408 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.919589: rtcpu_vinotify_event: tstamp:20580660758 cch:0 vi:1 tag:CHANSEL_PXL_SOF channel:0x23 frame:55 vi_tstamp:658580736032 data:0x0000000000000001
     kworker/1:1-55      [001] ....   644.919590: rtcpu_vinotify_event: tstamp:20580660890 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:55 vi_tstamp:658580774848 data:0x0000000008020077
     kworker/1:1-55      [001] ....   644.919590: rtcpu_vinotify_event: tstamp:20580661049 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658581003168 data:0x759e2d0010000000
     kworker/1:1-55      [001] ....   644.919590: rtcpu_vinotify_event: tstamp:20580661183 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658581046496 data:0x0000000031000078
     kworker/1:1-55      [001] ....   644.919590: rtcpu_vinotify_event: tstamp:20581533618 cch:1 vi:1tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:658607577088 data:0x759e2a0010000000
     kworker/1:1-55      [001] ....   644.919590: rtcpu_vinotify_event: tstamp:20581533754 cch:1 vi:1 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:658607620384 data:0x0000000031000001
     kworker/1:1-55      [001] ....   644.919590: rtcpu_vinotify_event: tstamp:20581533910 cch:1 vi:1 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:658607637984 data:0x759e270010000000
     kworker/1:1-55      [001] ....   644.919591: rtcpu_vinotify_event: tstamp:20581534042 cch:1 vi:1 tag:VIFALC_TDSTATE channel:0x22 frame:0 vi_tstamp:658607698912 data:0x0000000031000002
     kworker/1:1-55      [001] ....   644.919591: rtcpu_vinotify_event: tstamp:20582076808 cch:0 vi:1 tag:CHANSEL_PXL_EOF channel:0x23 frame:55 vi_tstamp:658613370016 data:0x0000000004af0002
     kworker/1:1-55      [001] ....   644.919591: rtcpu_vinotify_event: tstamp:20582076953 cch:0 vi:1 tag:FE channel:0x00 frame:55 vi_tstamp:658613370784 data:0x0000003700000022
     kworker/1:1-55      [001] ....   644.919591: rtcpu_vinotify_event: tstamp:20582077110 cch:0 vi:1 tag:ATOMP_FE channel:0x00 frame:55 vi_tstamp:658613370880 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.919592: rtcpu_vinotify_event: tstamp:20582077242 cch:0 vi:1 tag:ATOMP_FRAME_DONE channel:0x23 frame:55 vi_tstamp:658613371040 data:0x0000000000000000
     kworker/1:1-55      [001] ....   644.919592: rtcpu_vinotify_event: tstamp:20582077395 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:55 vi_tstamp:658613423296 data:0x0000000002020077
     kworker/1:1-55      [001] ....   644.919592: rtcpu_vinotify_event: tstamp:20582077529 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:55 vi_tstamp:658613439712 data:0x0000000000020077
     kworker/1:1-55      [001] ....   644.975594: rtcpu_vinotify_event: tstamp:20583785116 cch:0 vi:1 tag:FS channel:0x00 frame:56 vi_tstamp:658680720544 data:0x0000003800000012
     kworker/1:1-55      [001] ....   644.975595: rtcpu_vinotify_event: tstamp:20583785256 cch:0 vi:1 tag:ATOMP_FS channel:0x00 frame:56 vi_tstamp:658680720608 data:0x0000000800000000
     kworker/1:1-55      [001] ....   644.975595: rtcpu_vinotify_event: tstamp:20583785414 cch:0 vi:1 tag:CHANSEL_PXL_SOF channel:0x23 frame:56 vi_tstamp:658680723232 data:0x0000000000000001
     kworker/1:1-55      [001] ....   644.975595: rtcpu_vinotify_event: tstamp:20583785545 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:56 vi_tstamp:658680762048 data:0x0000000008020078
     kworker/1:1-55      [001] ....   644.975596: rtcpu_vinotify_event: tstamp:20583785697 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658680988544 data:0x759e300010000000
     kworker/1:1-55      [001] ....   644.975596: rtcpu_vinotify_event: tstamp:20583785830 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:658681035328 data:0x0000000031000079
 vi-output, ar02-1778    [001] ....   645.005118: tegra_channel_capture_frame: sof:658.680723232
 vi-output, ar02-1778    [001] ....   645.005119: tegra_channel_capture_frame: eof:658.713358272
     kworker/1:1-55      [001] ....   645.031595: rtcpu_vinotify_event: tstamp:20584843657 cch:0 vi:1 tag:CHANSEL_PXL_EOF channel:0x23 frame:56 vi_tstamp:

Can you please explane if this could be the root cause and if yes where we need to debug?

BR
Kris

22

hello wyss,

Orin has two VI engine, and it’s able to have two nodes to use the same VI port.
as you also repo’ed this by v4l IOCTL, it means there’s some conflict on low-level driver side to launch CSI-A/B (also CSI-C/D). please review the sensor init progress.

23

Hi jerryChang

Do you mean the ar0234_probe function with that?