GTE configuration and usage on SPE


I’m working with the following setup:

  • Jetson Orin Nano 4GB module
  • Custom carrier board
  • Jetpack 5.1.1 / L4T 35.3.1
  • Sources for the SPE part of the same release

On the SPE, I could successfully run the GPIO example (the output toggles as expected, and the interrupt code is executed). The only change I have compared to the documentation is that the GPIOs I’m using are:

  • GPIO CC07 for the output GPIO
  • GPIO DD00 for the input GPIO

Now I tried to set up the GTE, but I was not successful so far. I checked that:

  • The ENABLE_GTE_APP flag is set in the makefile
  • From the running linux system, “dtc -O dts /sys/firmware/devicetree/base/ | grep -A 5 gte@c1e0000 shows”:
    gte@c1e0000 {
    interrupts = <0x00 0x0d 0x04>;
    compatible = “nvidia,tegra234-gte-aon”;
    nvidia,int-threshold = <0x01>;
    status = “disabled”;
    nvidia,num-slices = <0x03>;
  • I updated tegra234-firewall-config-base.dtsi so that the reg@1359 entry has a value of 0x38001232

I found this related post (Timestamping GPIO transaction with SPE GTE - #5 by jachen), but it does not describe how I can find the mapping between a GPIO (eg. DD00) and the matching GTE slice IRQ (defined in rt-aux-cpu-demo-fsp/soc/t19x/include/gte-tegra-hw.h).

I tried to enable more bit in the GTE enable mask (than the default NV_AON_GTE_SLICE2_IRQ_GPIO_12 provided under gte-app.h), but it did not make a difference.

I’m also unsure if the firewall configuration would need to be adjusted with respect to the provided example, since I could not find documentation about this (eg. if the GPIO I’m using would be mapped to a different GTE slice).
Is there a way to check that the firewall configuration got updated on the board after flashing?

Any hint about how to further debug the GTE interrupt not triggering on my setup would be welcome.



  • GPIO DD00 for the input GPIO

Please try

Let me know if it can work or not.


1 Like

Hi @jachen,

It works fine, thanks a lot for your quick support.

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