HDMI have no clock output

Our project made a new PCB board according to jetson-tk1, it is very similar to tk1 except added one PCIe device.
But after I flashed the official image into new board, the HDMI have no clock output (system runs well).

When flashing, I used a BCT with DDR speed with 102MHz (the new board can’t work with default 924MHz any more but works with 102MHz).

The hardware releated to HDMI is very similar to jetson-tk1 with negligible difference. Two boards (all I have) have same problem so that seems it is not caused by soldering problems.

The same image works well on jetson-tk1 board with the same monitor (also same HDMI cable).

It is noticed that the HDMI monitor have been recognized correctly according to the output log of debug port (The name of monitor can be printed out correctly when plug-in HDMI cable). I think it meanings that the HPD, DDC is working correctly.

The HDMI_TXC, HDMI_TXD have no any signal (HDMI_TXCP have high level, HDMI_TXCN have low level).

What point shoud I check on the next? Is there any register can be dumped to debug why no clock output on HDMI_TXCP/N?

I have no real answer, but suggest you take the “/proc/config.gz” of a real Jetson and compare it to the one you have, especially looking at HDMI or video. Verify first that kernel config matches.

Using a image with debug openned, the “/proc/config.gz” is same (binary same). (Because both boards use same image).

And when HDMI cable plug-in, the debug log is:


ubuntu@tegra-ubuntu:~$ tegra_dc_hdmi_irq: start
tegra_dc_hdmi_irq: end
hdmi_state_machine_worker (tid e6754b00): state 3 (Disabled), hpd 1, pending_hpd_evt 1
hdmi_state_machine_set_state_l: switching from state 3 (Disabled) to state 0 (Reset)
hdmi_state_machine_worker (tid e6754b00): state 0 (Reset), hpd 1, pending_hpd_evt 0
hdmi_disable_l: audio_switch 0
hdmi_disable_l: hpd_switch 0
hdmi_state_machine_set_state_l: switching from state 0 (Reset) to state 1 (Check Plug)
hdmi_state_machine_worker (tid e6754b00): state 1 (Check Plug), hpd 1, pending_hpd_evt 0
hdmi_state_machine_set_state_l: switching from state 1 (Check Plug) to state 2 (Check EDID)
hdmi_state_machine_worker (tid e6754b00): state 2 (Check EDID), hpd 1, pending_hpd_evt 0
panel size 115 by 65
handle_check_edid_l: audio_switch 1
Display connected, hpd_switch 1
hdmi_state_machine_set_state_l: switching from state 2 (Check EDID) to state 4 (Enabled)
hdmi_state_machine_worker (tid e6754b00): state 4 (Enabled), hpd 1, pending_hpd_evt 0
tegradc tegradc.1: nominal-pclk:148500000 parent:594000000 div:4.0 pclk:148500000 147015000~161865000
tegra_dc_hdmi_enable: HDMI clock already configured to target frequency, skipping clk setup.
tegradc tegradc.1: nominal-pclk:148500000 parent:594000000 div:4.0 pclk:148500000 147015000~161865000


when HDMI cable plug-out, the debug log is:


ubuntu@tegra-ubuntu:~$ tegra_dc_hdmi_irq: start
tegra_dc_hdmi_irq: end
hdmi_state_machine_worker (tid e6754b00): state 4 (Enabled), hpd 0, pending_hpd_evt 1
hdmi_state_machine_set_state_l: switching from state 4 (Enabled) to state 5 (Wait for HPD reassert)
hdmi_state_machine_worker (tid e6754b00): state 5 (Wait for HPD reassert), hpd 0, pending_hpd_evt 0
hdmi_state_machine_set_state_l: switching from state 5 (Wait for HPD reassert) to state 0 (Reset)
hdmi_state_machine_worker (tid e6754b00): state 0 (Reset), hpd 0, pending_hpd_evt 0
hdmi_disable_l: audio_switch 0
hdmi_disable_l: hpd_switch 0
HDMI from connected to disconnected
hdmi_state_machine_set_state_l: switching from state 0 (Reset) to state 1 (Check Plug)
hdmi_state_machine_worker (tid e6754b00): state 1 (Check Plug), hpd 0, pending_hpd_evt 0
hdmi_disable_l: audio_switch 0
hdmi_disable_l: hpd_switch 0
hdmi_state_machine_set_state_l: switching from state 1 (Check Plug) to state 3 (Disabled)


From the log, it seems HDMI state machine works correctly, but no clock output from HDMI.

I compared the log with the jetson-tk1 board, the log is same when HDMI cable plug-in/out.

Is there any hardware issue can cause this phenomenon?

I see “panel size 115 by 65”, which is an unusual size. What kind of panel is this?

It’s a TV, the resolution of its panel is 3840x2160. The desktop resolution when jetson-tk1 connected is 1920x1080. Maybe “panel size 115 by 65” meanings the physical size of panel?

For reference, I’m using L4T R21.4.

This is quite interesting, I’ve done some google searches related to “panel size”, and mostly this seems to reflect the monitor resolution width by height in pixels, not in some odd format like inches or character cells (I could not find an official definition of panel size, but logs other people posted were showing the resolution in pixels, not something odd). So “115 by 65” would seem to be an error which should report 3840x2160 for your case, or perhaps whatever current resolution is being used. I have a somewhat older monitor which works well with Jetson TK1 (currently running 1600x1280 with get-edid and xrandr showing no errors), but is not always correctly detected by a JTX1 (detection works correctly on a JTX1 if the nVidia-specific files are installed). On the JTK1 hdmi unplug-plug I get this dmesg excerpt:

panel size 47 by 30

This monitor works fine until I try to go to the text mode console via ctrl-alt-F2, at which point I get either this:

[ 4012.104588] tegra-i2c tegra12-i2c.0: no acknowledge from address 0x50
[ 4012.106124] tegra-i2c tegra12-i2c.1: no acknowledge from address 0x50
[ 4012.107336] tegra-i2c tegra12-i2c.2: no acknowledge from address 0x50
[ 4012.108722] tegra-i2c tegra12-i2c.4: no acknowledge from address 0x50
[ 4013.111972] tegra-i2c tegra12-i2c.5: --- register dump for debugging ----
[ 4013.131064] tegra-i2c tegra12-i2c.5: I2C_CNFG - 0x2c00
[ 4013.136993] tegra-i2c tegra12-i2c.5: I2C_PACKET_TRANSFER_STATUS - 0xff0001
[ 4013.144148] tegra-i2c tegra12-i2c.5: I2C_FIFO_CONTROL - 0xe0
[ 4013.150347] tegra-i2c tegra12-i2c.5: I2C_FIFO_STATUS - 0x800040
[ 4013.156476] tegra-i2c tegra12-i2c.5: I2C_INT_MASK - 0xed
[ 4013.162276] tegra-i2c tegra12-i2c.5: I2C_INT_STATUS - 0x0
[ 4013.167954] tegra-i2c tegra12-i2c.5: msg->len - 1
[ 4013.173013] tegra-i2c tegra12-i2c.5: is_msg_write - 1
[ 4013.178255] tegra-i2c tegra12-i2c.5: next_msg->len - 1
[ 4013.183811] tegra-i2c tegra12-i2c.5: is_next_msg_write - 0
[ 4013.189559] tegra-i2c tegra12-i2c.5: buf_remaining - 1
[ 4013.195024] tegra-i2c tegra12-i2c.5: i2c transfer timed out, addr 0x0050, data 0x00
[ 4044.469068] tegra-i2c tegra12-i2c.0: no acknowledge from address 0x50
[ 4044.472233] tegra-i2c tegra12-i2c.1: no acknowledge from address 0x50
[ 4044.474975] tegra-i2c tegra12-i2c.2: no acknowledge from address 0x50
[ 4044.478334] tegra-i2c tegra12-i2c.4: no acknowledge from address 0x50
[ 4045.480388] tegra-i2c tegra12-i2c.5: --- register dump for debugging ----
[ 4045.497031] tegra-i2c tegra12-i2c.5: I2C_CNFG - 0x2c00
[ 4045.508452] tegra-i2c tegra12-i2c.5: I2C_PACKET_TRANSFER_STATUS - 0xff0001
[ 4045.519916] tegra-i2c tegra12-i2c.5: I2C_FIFO_CONTROL - 0xe0
[ 4045.525853] tegra-i2c tegra12-i2c.5: I2C_FIFO_STATUS - 0x800040
[ 4045.532064] tegra-i2c tegra12-i2c.5: I2C_INT_MASK - 0xed
[ 4045.537784] tegra-i2c tegra12-i2c.5: I2C_INT_STATUS - 0x0
[ 4045.543757] tegra-i2c tegra12-i2c.5: msg->len - 1
[ 4045.548671] tegra-i2c tegra12-i2c.5: is_msg_write - 1
[ 4045.554088] tegra-i2c tegra12-i2c.5: next_msg->len - 1
[ 4045.559505] tegra-i2c tegra12-i2c.5: is_next_msg_write - 0
[ 4045.565437] tegra-i2c tegra12-i2c.5: buf_remaining - 1
[ 4045.570860] tegra-i2c tegra12-i2c.5: i2c transfer timed out, addr 0x0050, data 0x00

…or sometimes this excerpt instead:

tegradc tegradc.1: pclk out of range!

I am suspicious that this may be related to some JTX1 issues which resolve after completing the nVidia-specific file installation on R23.1, or after flash with apply_binaries.sh completed. I simply have not been using this monitor in text mode console after logging in to GUI…I’ve either booted and gone straight to console via ctrl-alt-F2, not using GUI, or used remote login for text mode console (when using the monitor for text mode I’ve always used the GUI’s terminal app…until now I wasn’t trying ctrl-alt-F# for pure text mode).

There is a reasonable possibility that what you are seeing is an incorrect pixel clock setting due to some part of the software misunderstanding the monitor’s resolution. If you have another monitor which was not intended to exceed 1920x1080, can you give that a try and see what happens? This could be difficult to debug without a combination of a monitor which has the issue and an i2c logic analyzer.

I have only the TV in hand, I will try looking for another monitor to test this issue.

Hi linuxdev,

Thanks for your reply. We have located the problem, there is a hardware issue which incorrectly invert control signal of AVDD_HDMI_PLL, that caused AVDD_HDMI_PLL is lost when HDMI cable plug-in, that is why no HDMI clock output.

For “panel size 115 by 65”, I searched them in code, found:

struct fb_monspecs {
	...
	__u8  max_x;			/* Maximum horizontal size (cm) */
	__u8  max_y;			/* Maximum vertical size (cm) */
}

When they are copied to tegra_dc_out:

dc->out->h_size = specs.max_x * 10; /* in mm */
dc->out->v_size = specs.max_y * 10;

There is comment in define of tegra_dc_out:

struct tegra_dc_out {
	...
	/* size in mm */
	unsigned			h_size;
	unsigned			v_size;
	...
}

So that “panel size 115 by 65” should be the physical size of TV panel (in units of “cm”).
I measured the TV size and its physical size is very close to 115cm by 65 cm (not exactly identical).

BTW, when get-edid, the result shows “1150 by 650”, I think it used units of “mm”.