Hi,
I have connected an FPGA endpoint in PCIe slot of Jetson AGX Xavier. We are facing Malformed TLP when we perform PCIe transaction. I want exact detail of this Malformed TLP. So I checked trm and there is register PCIE_X8_RC_PF0_RAS_DES_CAP_SD_STATUS_L3_REG_0, which gives details in MFTLP_POINTER fields. Since I’m using controller 5, i checked this value at 0x3a000280 and 0x3a000264 but in both locations the value i got is zero(Though i got Malformed TLP error in dmesg).
The register you are looking for should be 0x3a000294.
7 RW 0x0 MFTLP_STATUS:
Malformed TLP Status. Indicates malformed TLP has occurred.
6:0 RO 0x0 MFTLP_POINTER:
First Malformed TLP Error Pointer. Indicates the element of the received first malformed TLP. This pointer is validated by MFTLP_STATUS. All encodings other than the defined encodings are reserved. Note: This register field is sticky
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