We are forming MSI TLP Packet in FPGA Endpoint and transferring it to the Jetson AGX Xavier Root complex. We are trying to use multi vector MSI interrupt. We are setting different values in the MSI Message data register in the MSI TLP packet to invoke MSI interrupt vector 1 handler. But, irrespective of value in MSI message register, only MSI vector 0 handler is being invoked in the Root complex. We need to log the MSI TLP packet for debugging this issue. Suggest some ways to log the MSI TLP packet on the Root complex side.
The values we used in the MSI message register is provided in the image below.
We have checked with our teams and don’t have much experience in this protocol. In our adaptation guide:
Jetson AGX Orin Platform Adaptation and Bring-Up — Jetson Linux<br/>Developer Guide 34.1 documentation
We have the commands for testing functionality:
- On the endpoint system, you might access the shared RAM using BusyBox. To read the RAM, enter the following command:
busybox devmem 0x4307b8000
- To write the RAM with random value, enter the following command:
busybox devmem 0x4307b8000 32 0xfa950000
Can it be applied to the FPGA Endpoint device? Or the device only works with MSI TLP Packet?