Hi ,
We are making custom carrier board for the Jetson AGX xavier module.
And we have configured the PCIe ports as below.
1.PCIe x1 (UPHY0 C1 )- Used for SATA in custom carrier board
2.PCIe x1 (UPHY7 C3 )- Used for I210 in custom carrier board .
3.PCIe x1 (UPHY8 C4 )- Used for I210 in custom carrier board
In the “jetson_agx_xavier_series_oem_product_design_guide1104.pdf” document Table18 shows that UPHY8 is not used. How to configure UPHY8 to PCIe x1?
kernel version: Jetpack4.3
Thanks
UPHY8 is not used because there is no slot for C4 controller. If you are planning to have a slot for C4 controller on your custom design board, make sure that the Tx/Rx routing is fine and also the routing of all sideband signals like PERST#, CLKREQ# & REFCLK.
From SW side, enable the PCIe C4 controller’s node in the DT i.e. ‘pcie@14160000’.
Hi, vidyas.
The interface of the C4 controller has been designed on the custom carrier board, the Tx/Rx ,PERST#,CLKREQ# & REFCLK is fine. How to enable the PCIe C4 controller node in the software? Now, only uphy7 can recognize i210, and uphy8 can’t recognize i210 network card.
Thanks.
Did you try enabling the PCIe C4 controller in the device-tree as I mentioned in my earlier comment #3?
Can you please share the dmesg log?
I modified this file:tegra194-soc-pcie.dtsi
pcie@14160000 {
compatible = "nvidia,tegra194-pcie", "snps,dw-pcie";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000 /* appl registers (128K) */
0x00 0x36000000 0x0 0x00040000 /* configuration space (256K) */
0x00 0x36040000 0x0 0x00040000>; /* iATU_DMA reg space (256K) */
reg-names = "appl", "config", "atu_dma";
status = "okay";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
num-lanes = <4>;
linux,pci-domain = <4>;
clocks = <&bpmp_clks TEGRA194_CLK_PEX0_CORE_4>,
<&bpmp_clks TEGRA194_CLK_PEX0_CORE_4M>;
clock-names = "core_clk", "core_clk_m";
resets = <&bpmp_resets TEGRA194_RESET_PEX0_CORE_4_APB>,
<&bpmp_resets TEGRA194_RESET_PEX0_CORE_4>;
reset-names = "core_apb_rst", "core_rst";
interrupts = <0 51 0x04>, /* controller interrupt */
<0 52 0x04>; /* MSI interrupt */
interrupt-names = "intr", "msi";
iommus = <&smmu TEGRA_SID_PCIE4>;
dma-coherent;
#if LINUX_VERSION >= 414
iommu-map = <0x0 &smmu TEGRA_SID_PCIE4 0x1000>;
iommu-map-mask = <0x0>;
#endif
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc 0 51 0x04>;
nvidia,dvfs-tbl = < 204000000 204000000 204000000 408000000
204000000 204000000 408000000 800000000
204000000 408000000 800000000 1600000000
0 0 0 0 >;
nvidia,max-speed = <4>;
nvidia,disable-aspm-states = <0xf>;
nvidia,controller-id = <&bpmp 0x4>;
nvidia,disable-l1-cpm;
nvidia,aux-clk-freq = <0x13>;
nvidia,preset-init = <0x5>;
nvidia,aspm-cmrt = <0x3C>;
nvidia,aspm-pwr-on-t = <0x14>;
nvidia,aspm-l0s-entrance-latency = <0x3>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */
0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xC0000000 /* non-prefetchable memory (3GB) */
0xc2000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000>; /* prefetchable memory (13GB) */
nvidia,cfg-link-cap-l1sub = <0x1b0>;
nvidia,cap-pl16g-status = <0x174>;
nvidia,cap-pl16g-cap-off = <0x188>;
nvidia,event-cntr-ctrl = <0x1c4>;
nvidia,event-cntr-data = <0x1c8>;
nvidia,margin-port-cap = <0x190>;
nvidia,margin-lane-cntrl = <0x194>;
nvidia,dl-feature-cap = <0x2f8>;
};
dmesg log
nvidia@xavier:~$ dmesg | grep pcie
[ 0.926424] iommu: Adding device 14180000.pcie to group 0
[ 0.927292] iommu: Adding device 14100000.pcie to group 1
[ 0.928173] iommu: Adding device 14140000.pcie to group 2
[ 0.928952] iommu: Adding device 14160000.pcie to group 3
[ 0.929715] iommu: Adding device 141a0000.pcie to group 4
[ 0.994693] GPIO line 490 (pcie-reg-enable) hogged as output/high
[ 0.994731] GPIO line 289 (pcie-reg-enable) hogged as output/high
[ 8.123663] tegra-pcie-dw 14180000.pcie: Setting init speed to max speed
[ 8.124555] OF: PCI: host bridge /pcie@14180000 ranges:
[ 8.638399] tegra-pcie-dw 14180000.pcie: link is down
[ 8.638522] tegra-pcie-dw 14180000.pcie: PCI host bridge to bus 0000:00
[ 8.639289] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt
[ 8.639296] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded
[ 8.639387] aer 0000:00:00.0:pcie002: service driver aer loaded
[ 8.639534] pcie_pme 0000:00:00.0:pcie001: unloading service driver pcie_pme
[ 8.639570] aer 0000:00:00.0:pcie002: unloading service driver aer
[ 8.641188] tegra-pcie-dw 14180000.pcie: PCIe link is not up…!
[ 8.642056] tegra-pcie-dw 14100000.pcie: Setting init speed to max speed
[ 8.643109] OF: PCI: host bridge /pcie@14100000 ranges:
[ 8.750457] tegra-pcie-dw 14100000.pcie: link is up
[ 8.750741] tegra-pcie-dw 14100000.pcie: PCI host bridge to bus 0001:00
[ 8.764104] pcieport 0001:00:00.0: Signaling PME through PCIe PME interrupt
[ 8.764130] pcie_pme 0001:00:00.0:pcie001: service driver pcie_pme loaded
[ 8.764272] aer 0001:00:00.0:pcie002: service driver aer loaded
[ 8.766482] tegra-pcie-dw 14140000.pcie: Setting init speed to max speed
[ 8.767247] OF: PCI: host bridge /pcie@14140000 ranges:
[ 8.874483] tegra-pcie-dw 14140000.pcie: link is up
[ 8.874675] tegra-pcie-dw 14140000.pcie: PCI host bridge to bus 0003:00
[ 8.888026] pcieport 0003:00:00.0: Signaling PME through PCIe PME interrupt
[ 8.888056] pcie_pme 0003:00:00.0:pcie001: service driver pcie_pme loaded
[ 8.888146] aer 0003:00:00.0:pcie002: service driver aer loaded
[ 8.920076] tegra-pcie-dw 14160000.pcie: Setting init speed to max speed
[ 8.920087] tegra-pcie-dw 14160000.pcie: unable to find phy entries
[ 8.920253] tegra-pcie-dw 14160000.pcie: DT parsing failed: -22
[ 8.920401] tegra-pcie-dw: probe of 14160000.pcie failed with error -22
[ 8.920776] tegra-pcie-dw 141a0000.pcie: Setting init speed to max speed
[ 8.921770] OF: PCI: host bridge /pcie@141a0000 ranges:
[ 9.435364] tegra-pcie-dw 141a0000.pcie: link is down
[ 9.435602] tegra-pcie-dw 141a0000.pcie: PCI host bridge to bus 0005:00
[ 9.436545] pcieport 0005:00:00.0: Signaling PME through PCIe PME interrupt
[ 9.436552] pcie_pme 0005:00:00.0:pcie001: service driver pcie_pme loaded
[ 9.436671] aer 0005:00:00.0:pcie002: service driver aer loaded
[ 9.436813] pcie_pme 0005:00:00.0:pcie001: unloading service driver pcie_pme
[ 9.436859] aer 0005:00:00.0:pcie002: unloading service driver aer
[ 9.438652] tegra-pcie-dw 141a0000.pcie: PCIe link is not up…!
nvidia@xavier:~$
Please apply the below change in the respective file to enable C4 controller.
diff --git a/common/tegra194-p2888-0000-a00.dtsi b/common/tegra194-p2888-0000-a00.dtsi
index 2c5f7eb..4c01d89 100644
--- a/common/tegra194-p2888-0000-a00.dtsi
+++ b/common/tegra194-p2888-0000-a00.dtsi
@@ -133,6 +133,22 @@
phy-names = "pcie-p2u-0";
};
+ pcie@14160000 {
+ status = "okay";
+
+ vddio-pex-ctl-supply = <&p2888_spmic_sd3>;
+ nvidia,disable-aspm-states = <0xf>;
+ nvidia,enable-power-down;
+ nvidia,disable-clock-request;
+
+ nvidia,max-speed = <4>;
+
+ phys = <&p2u_8>,
+ <&p2u_9>;
+
+ phy-names = "pcie-p2u-0", "pcie-p2u-1";
+ };
+
pcie@141a0000 {
status = "disabled";
Thank you, PCIe C4 is working normally