How to disable Spread Spectrum Clocking(SSC) on Orin

The driver package we use is Jetson Linux 34.1.1
The pcie controller is c5 root port(0x141a0000)

Our team will do the investigation and provide suggestions soon. Thanks

Ok. Thank you for your reply.

Please use the below patch to disable spread for PLLE, NVHS, and GBE PLLs

diff --git a/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi b/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi
index 4eb42bd..6226a9d 100644
--- a/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi
+++ b/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi
@@ -32,4 +32,21 @@
 		gbe-uphy-config = <22>;
+	clocks {
+		clock@plle {
+			clk-id = <TEGRA234_CLK_PLLE>;
+			disable-spread = <1>;
+		};
+		clock@pllnvhs {
+			clk-id = <TEGRA234_CLK_PLLNVHS>;
+			disable-spread = <1>;
+		};
+		clock@pllgbe {
+			clk-id = <TEGRA234_CLK_PLLGBE>;
+			disable-spread = <1>;
+		};
+	};
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We will try it.

where can i find 3701-0000-3737-0000-uphy.dtsi?

It should be at $TOP/platform/bpmp-t23x/ location


The code of this is not public. Please use dtc tool to convert your bpmp dtb under Linux_for_Tegra/bootloader back to dts and add what vidyas shared.


@WayneWWW: I’m also looking for the dtb in the JetPack 5.0 BSP binary, but under Linux_for_Tegra/bootloader there is no dtb regarding bpmp or uphy. In the BSP source, I also couldn’t find the dtsi that @vidyas suggested or any dtsi that contains the entries like ‘gbe0-enable-10g’. Could you please tell me exactly which dtb I should look for? Thanks!

You can try to add * to your search.

/Linux_for_Tegra/bootloader$ find -iname "*bpmp*.dtb"

I see, they reside in the sub-directory. Thank you for the prompt answer!

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