Jetson NX DevKit DisplayPort SSC

[boris.borukhin1]

The Display Port output from the Jetson NX development kit is not working when driving a FPGA with Xilinx Display Port Core.
How Can we enable/disable the Display Port output Spread Spectrum Clocking ?

[WayneWWW]

Hi,

There are two items to do to disable the DP SSC.

1. First, configuring the bpmp dtb.

Since bpmp dtb is not public source, you have to use dtc tool to convert the dtb back to dts, modify the dts and then compile it back to dtb.

Detail steps:

1. De-compile the BPMP DTB from release SDK 32.6.1. By default, for Xavier NX eMMC module, it should be tegra194-a02-bpmp-p3668-a00.dtb, in Linux_for_Tegra/
dtc -I dtb -O dts -o ~/temp/tegra194-a02-bpmp-p3668-a00.dts ./bootloader/t186ref/tegra194-a02-bpmp-p3668-a00.dtb
2. Edit the dts file vim ~/temp/tegra194-a02-bpmp-p3668-a00.dts, with following change:
--- /home/chenjian/temp/tegra194-a02-bpmp-p3668-a00.orig.dts    2021-09-17 11:07:05.652155387 +0800
+++ /home/chenjian/temp/tegra194-a02-bpmp-p3668-a00.dts    2021-09-17 13:26:13.497163794 +0800
@@ -563,6 +563,12 @@
             clk-id = <0xb8>;
         };
 
+        clock@pll_dp {
+            clk-id = <0x62>;
+            pll_freq_table = <38400000 270000000 1 42 6 62976 (-1) (-1) (-1)>;
+        };
+
         clock@nvdisplayhub {
             allowed-parents = <0x116 0xe>;
             clk-id = <0x54>;
3. Re-compile the updated BPMP dtb by:
dtc -I dts -O dtb -o ~/temp/tegra194-a02-bpmp-p3668-a00.updated.dtb ~/temp/tegra194-a02-bpmp-p3668-a00.dts

4. Replace the BPMP DTB and re-flash the device. The new configuration should take effect.
sudo cp ~/temp/tegra194-a02-bpmp-p3668-a00.updated.dtb ./bootloader/t186ref/tegra194-a02-bpmp-p3668-a00.dtb
sudo ./flash jetson-xavier-nx-devkit-emmc mmcblk0p1

Second,
you need to set NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP_NONE in dp.c instead of NV_DPCD_DOWNSPREAD_CTRL_SPREAD_AMP_LT_0_5

kernel/nvidia/drivers/video/tegra/dc/dp.c → dc_dp_enable