Please use the below patch to disable spread for PLLE, NVHS, and GBE PLLs
diff --git a/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi b/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi
index 4eb42bd..6226a9d 100644
--- a/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi
+++ b/include/parts/uphy/3701-0000-3737-0000-uphy.dtsi
@@ -32,4 +32,21 @@
gbe-uphy-config = <22>;
gbe0-enable-10g;
};
+
+ clocks {
+ clock@plle {
+ clk-id = <TEGRA234_CLK_PLLE>;
+ disable-spread = <1>;
+ };
+
+ clock@pllnvhs {
+ clk-id = <TEGRA234_CLK_PLLNVHS>;
+ disable-spread = <1>;
+ };
+
+ clock@pllgbe {
+ clk-id = <TEGRA234_CLK_PLLGBE>;
+ disable-spread = <1>;
+ };
+ };
};