Hi Nvidia Team,
We have Jetson Xavier NX custom board and want to bring up high resolution camera which has 8lane MIPI support. Need to know how to enable the gang mode on Jetson Xavier nx platform.
Thanks in advance.
With Regards,
Ashwath B N
Hi Nvidia Team,
We have Jetson Xavier NX custom board and want to bring up high resolution camera which has 8lane MIPI support. Need to know how to enable the gang mode on Jetson Xavier nx platform.
Thanks in advance.
With Regards,
Ashwath B N
hello ashwath.narasimhamurthy,
Xavier series did not enabled gang modes.
may I know the real use-case for running high resolution camera.
you may follow below to evaluate the data-rate.
for example, 8000x6000, 10-bit, 10-fps.
CSI data rate = 8000 * 6000 * 10 * 10 * 1.15 (overhead) = 5,520,000,000
~= 5.5 Gbps
So, the use case is to get 20M @ 30 FPS sensor (5120x3840 @ 1620 Mbps) with sensor 8 Lane mipi to verify sensor is providing data correctly over 8 Lane mipi. Also, we need to implement stereo camera.
Pixel{0,1,2,3} → Phy0{0,1,2,3} → MIPI 1
Pixel{4,5,6,7} → Phy1{0,1,2,3} -->MIPI 2
One of your earlier thread I found that gang mode is supported for Xavier NX. I am working on SDK r.35.1.0.
could you please point-out the topic-id, that should be something wrong, gang mode only tested on TX2 series.
Please find the link below
https://forums.developer.nvidia.com/t/xavier-nx-using-multiple-mipi-channels-to-increase-data-throughput/189985/5
ohh… okay, there’re driver code to have gang mode support. however, gang mode has only tested on TX2 series.
why you must using gang mode? this should within the CSI bandwidth (i.e. 4-lane) of Xavier series.
we have few customers who will be going to use 90 and 120 FPS also and with mentioned resolution can’t be achieved with 4Lane. 8 Lane we can go 20 Gbps to achieve different use cases.
Do you mean r35.1.0 has everything required in driver for gang mode? If so, could you let me know what all changes I need to do in my sensor driver and DTSI?
hello ashwath.narasimhamurthy,
driver is there. you may see-also TX2’s driver, tc358840 for reference.
for example, $public_sources/kernel_src/hardware/nvidia/platform/t18x/quill/kernel-dts/quill-modules/tegra186-camera-imx274.dtsi
Hi JerryChang,
My are all other features are working with r35.1.0. I want to retain the r35.1.0 even for gang mode. Can we refer the tegra186-camera-imx274.dtsi and do exact changers in our driver is sufficient for gang mode to work? or Any kernel changes are required?
Thanks
hello ashwath.narasimhamurthy,
there’s no additional changes, please go ahead for verification.
as I mentioned several times.
however, gang mode has only tested on TX2 series.
Hi JerryChang
Sorry for repeatedly asking about the version (r35.1.0) supports gang mode or not. We were in the impression that to support gang mode on Jetson Xavier NX we need to back port to older version like r32.7.x. Hence double confirming with you before starting the gang mode activity.
I went through the tegra186-camera-imx274.dtsi file changes observed was bus-width = <8> to be set and few more things to cross-check was for tc358840 entry in tegra186-camera-imx274.dtsi doesn’t contain mode0 settings and no driver node created.
Thanks
hello ashwath.narasimhamurthy,
it’s VI driver, channel.c
to parse the number of lanes. since a CSI brick can support up-to 4-lane config.
it’ll enable two CSI bricks for the settings of bus-width = <8>;
and it’s gang mode, (i.e. left-right) to handle surface config.
Hi JerryChang,
I have done the required changes at my end by referring the tegra186-camera-imx274.dtsi which sets bus-width = <8>;
I am executing v4l2 application to capture frame.
sudo v4l2-ctl --set-fmt-video=width=5120,height=3840,pixelformat=BA10 --stream-mmap -d /dev/video0 --verbose --stream-to=file.raw --stream-count=1
I am getting below error at my end. I checked the sensor state, it’s in streaming mode and frame count register is incrementing.
[ 1559.085430] ar2020 2-0036: ar2020_power_on: power on
[ 1559.085439] ar2020 2-0036: ar2020_power_on: release reset
[ 1559.155057] [RCE] vi5_hwinit: firmware CL2018101701 protocol version 2.2
[ 1559.279874] ar2020 2-0036: start streaming
[ 1561.715045] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1561.715218] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1561.715366] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1561.723943] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1564.274980] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1564.275135] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1564.275302] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1564.283256] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1566.834981] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1566.835150] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1566.835296] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1566.844277] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1569.394976] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1569.395136] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1569.395309] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1569.403747] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1571.954965] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1571.955129] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1571.955301] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1571.963252] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1574.514972] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1574.515144] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1574.515320] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1574.523051] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1577.074996] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1577.075161] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1577.075314] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1577.083042] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1579.635012] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1579.635164] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1579.635304] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1579.648792] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1582.194978] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1582.195138] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1582.195287] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1582.204079] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1584.754973] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1584.755151] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1584.755298] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1584.763066] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1587.314974] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1587.315129] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1587.315299] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1587.323175] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 1589.874971] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 1589.875161] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 1589.875306] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 1589.883095] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
I have attached the DTSI for your reference. Can you please look into it and confirm changes are fine or any required configuration is missing?
tegra194-camera-ar2020-a00.dtsi (3.8 KB)
tegra194-p3509-0000-camera-ar2020-a00.dtsi (632 Bytes)
tegra194-p3509-camera-ar2020.dtsi (2.0 KB)
Thanks
please check whether it’s handling two CSI bricks correctly,
could you please add some debug print with VI driver for confirmation,
for example, $public_sources/kernel_src/kernel/nvidia/drivers/media/platform/tegra/camera/vi/channel.c
static void tegra_channel_fmts_bitmap_init(struct tegra_channel *chan)
{
...
if (chan->total_ports > 1)
update_gang_mode(chan);
static void update_gang_mode(struct tegra_channel *chan)
{
...
update_gang_mode_params(chan);
}
I have attached the dmesg log for your reference with prints added in the above functions mentioned and also in __tegra_channel_set_format since it calls update_gang_mode() .
dmesg.log (73.5 KB)
Log snippet for quick reference.
nx@ubuntu:~$ sudo dmesg | grep “tegra_channel_fmts_bitmap_init”
[ 3.461307] tegra194-vi5 15c10000.vi: tegra_channel_fmts_bitmap_init: Enter
[ 3.461493] tegra194-vi5 15c10000.vi: tegra_channel_fmts_bitmap_init: calling update_gang_mode()
nx@ubuntu:~$ sudo dmesg | grep “update_gang_mode”
[ 3.461493] tegra194-vi5 15c10000.vi: tegra_channel_fmts_bitmap_init: calling update_gang_mode()
[ 3.461658] tegra194-vi5 15c10000.vi: update_gang_mode: Enter
[ 3.461766] tegra194-vi5 15c10000.vi: update_gang_mode: gang_mode = 1 total_port = 2
[ 3.461905] tegra194-vi5 15c10000.vi: update_gang_mode_params: Enter
[ 76.704344] tegra194-vi5 15c10000.vi: __tegra_channel_set_format: calling update_gang_mode()
[ 76.704661] tegra194-vi5 15c10000.vi: update_gang_mode: Enter
[ 76.704771] tegra194-vi5 15c10000.vi: update_gang_mode: gang_mode = 1 total_port = 2
[ 76.704900] tegra194-vi5 15c10000.vi: update_gang_mode_params: Enter
hello ashwath.narasimhamurthy,
it looks the VI layer works as expected.
the following error reported is due to capture engine cannot recognize start-of-frame/end-of-frame om the CSI channel.
[ 76.787353] [RCE] vi5_hwinit: firmware CL2018101701 protocol version 2.2
[ 76.933461] ar2020 2-0036: start streaming
[ 79.475051] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 79.475241] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 79.475408] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 79.475921] tegra194-vi5 15c10000.vi: framecount[5] : 97
ok, we understand in a similar way.
Question is for same 20MP sensor with 4lane configuration(bus-width=4) works properly as expected. For 8lane configuration(bus-width=8) it should work similar way with additional CSI brick?
The DTSI changes shared earlier is sufficient? or anything else need to be changed in DTSI so we can resolve the above error and capture the frame at our end.
Thanks
hello ashwath.narasimhamurthy,
please give it a try with below commands to boost all the VI/CSI/ISP clocks.
sudo su
echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/isp/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/emc/mrq_rate_locked
cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
cat /sys/kernel/debug/bpmp/debug/clk/isp/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/isp/rate
cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate
I tried boosting the VI/CSI/ISP clocks, no change getting same error at our end.
Default configuration configures pixel data at our end as below.
Pixel{0,1,2,3} => Phy0{0,1,2,3} => MIPI 1
Pixel{4,5,6,7} => Phy1{0,1,2,3} => MIPI 2
hello ashwath.narasimhamurthy,
is it possible to send two separate contents to two CSI bricks for confirmation?