How to Enable GPIO7/LCD_BL_PWM_PV0 as PWM0 on Nano

I’m using BSP 32.2.1 on Nano and I am trying to use GPIO7/LCD_BL_PWM_PV0 which is also capable of working as PWM0 based on the Nano_Module_Pinmux_Config template/datasheet provided by NVIDIA.

I started by establishing that I could use GPIO14/PE7 (attached to the FAN) which has a dual functionality as PMW3 as described in the Nano_Module_Pinmux_Config template i.e toggle its value between 0 and 1 after exporting it as a GPIO pin using through its sysfs number. In this case the sysfs number was calculated to be 39. I was successful in using the pin as a GPIO to start the fan and I measured the output voltage of the pin and it was 5v.

I unexported the GPIO14 pin and set it up as a PWM, and then used the /usr/bin/jetson_clocks command to start the fan at its default target_pwm value of 255, and I was also successful. I measured the signal output on the Oscilloscope. It showed up on the oscilloscope as a PWM signal for a couple of seconds and its duty_cycle rose really fast till it hit a 100% and no longer showed up as a PWM signal, but now as a constant pulse at 5v. To prove it was PWM pulse, I fiddled with the /sys/devices/pwm-fan/target_pwm value and made it a fraction of the default value of 255, like 70, 80 and 155 and the signal showed up on the Oscilloscope as a PWM signal with a corresponding duty cycle value that was less than 100% but equal to the (target_pwm/255)%.

The steps taken above showed me that the pin worked as a GPIO and PWM if the setup is done properly. Therefore, I decided to replicate this for another pin with a dual GPIO and PWM functionality.

This pin is GPIO7/PWM0/LCD_BL_PWM_PV0. Unfortunately, I was only able to use the pin as a GPIO pin as I could toggle it ON and OFF and view the signal and its value on both a multimeter and an Oscilloscope and it was 0 for OFF and 3.3v for ON. After unexporting the pin and setting it up as a PWM signal (i.e exporting the PWM pin; setting its period, setting its duty_cycle and then enabling it), there was no signal output change on the Oscilloscope. The output stayed at the origin on the Oscilloscope, which indicates the pin failed to produce and output signal. I was wondering where I could make a change to the configuration setup, such that I can make the pin work as a PWM and possibly replicate my findings with the fan.

As it currently stands, I changed the value of the GPIO7 in the table here -> Linux_for_tegra/sources/u-boot/pinmux-config-p3450-porg.h file to match that the value of GPIO14 because GPIO14/FAN was setup as PWM3, but GPIO7 was setup as default. So the change I made was to mux, pull and tri values on the table to match their equivalent GPIO14 values. Then I built u-boot and copied the u-boot.bin file to Linux_for_Tegra/bootloader/t210ref/p3450-porg/ directory, but it didn’t make a difference.

Then I also changed the dtsi here -> Linux_for_Tegra/sources/hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-pinmux-p3448-0000-a02-custom.dtsi with a similar intention as above, i.e. to match the values of GPIO7/LCD_BL_PWM_PV0 to GPIO14/PE7/FAN because GPIO14/PE7/FAN was setup as pwm3, but the GPIO7/LCD_BL_PWM_PV0 was set as rsvd. I changed rsvd to PWM0, then built the kernel, but it made no difference

Is anyone familiar with where I can make a change to the configuration setup in order for me to accomplish my goal of making GPIO7/LCD_BL_PWM_PV0 work as PWM0?

Hi,

Let me summary your problem now.

  1. The working GPIO/PWM set
    GPIO14

  2. The not working GPIO/PWM
    GPIO07 -> Only works as GPIO but fails to be PWM0.

Method you’ve tried:

  • change in uboot.bin
  • change in pinmux spreadsheet (?)

I would suggest you to move to rel-32.3 for debug since it is the latest release and after this release you only need to modify the dtb for all pinmux setting. No need to change uboot anymore.

Also, please share the result of below on your tegra.
root@nvidia-desktop:/sys/kernel/debug/pinctrl/700008d4.pinmux# cat pinmux-pins

1 Like

Thank you. I was able to make GPIO7 work as a PWM after moving to Rel-32.3 and changing the value of GPIO7 on the pinmux spreadsheet as recommended.

And here’s the result you requested:

root@nvidia-desktop:/sys/kernel/debug/pinctrl/700008d4.pinmux# cat pinmux-pins
Pinmux settings per pin
Format: pin (name): mux_owner gpio_owner hog?
pin 0 (PEX_L0_RST_N PA0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 1 (PEX_L0_CLKREQ_N PA1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 2 (PEX_WAKE_N PA2): (MUX UNCLAIMED) tegra-gpio:2
pin 3 (PEX_L1_RST_N PA3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 4 (PEX_L1_CLKREQ_N PA4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 5 (SATA_LED_ACTIVE PA5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 6 (PA6): (MUX UNCLAIMED) tegra-gpio:6
pin 8 (DAP1_FS PB0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 9 (DAP1_DIN PB1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 10 (DAP1_DOUT PB2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 11 (DAP1_SCLK PB3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 12 (SPI2_MOSI PB4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 13 (SPI2_MISO PB5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 14 (SPI2_SCK PB6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 15 (SPI2_CS0 PB7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 16 (SPI1_MOSI PC0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 17 (SPI1_MISO PC1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 18 (SPI1_SCK PC2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 19 (SPI1_CS0 PC3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 20 (SPI1_CS1 PC4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 21 (SPI4_SCK PC5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 22 (SPI4_CS0 PC6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 23 (SPI4_MOSI PC7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 24 (SPI4_MISO PD0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 25 (UART3_TX PD1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 26 (UART3_RX PD2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 27 (UART3_RTS PD3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 28 (UART3_CTS PD4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 32 (DMIC1_CLK PE0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 33 (DMIC1_DAT PE1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 34 (DMIC2_CLK PE2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 35 (DMIC2_DAT PE3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 36 (DMIC3_CLK PE4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 37 (DMIC3_DAT PE5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 38 (PE6): (MUX UNCLAIMED) tegra-gpio:38
pin 39 (PE7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 40 (GEN3_I2C_SCL PF0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 41 (GEN3_I2C_SDA PF1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 48 (UART2_TX PG0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 49 (UART2_RX PG1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 50 (UART2_RTS PG2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 51 (UART2_CTS PG3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 56 (WIFI_EN PH0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 57 (WIFI_RST PH1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 58 (WIFI_WAKE_AP PH2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 59 (AP_WAKE_BT PH3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 60 (BT_RST PH4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 61 (BT_WAKE_AP PH5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 62 (PH6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 63 (AP_WAKE_NFC PH7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 64 (NFC_EN PI0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 65 (NFC_INT PI1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 66 (GPS_EN PI2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 67 (GPS_RST PI3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 68 (UART4_TX PI4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 69 (UART4_RX PI5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 70 (UART4_RTS PI6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 71 (UART4_CTS PI7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 72 (GEN1_I2C_SDA PJ0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 73 (GEN1_I2C_SCL PJ1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 74 (GEN2_I2C_SCL PJ2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 75 (GEN2_I2C_SDA PJ3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 76 (DAP4_FS PJ4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 77 (DAP4_DIN PJ5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 78 (DAP4_DOUT PJ6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 79 (DAP4_SCLK PJ7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 80 (PK0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 81 (PK1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 82 (PK2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 83 (PK3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 84 (PK4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 85 (PK5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 86 (PK6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 87 (PK7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 88 (PL0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 89 (PL1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 96 (SDMMC1_CLK PM0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 97 (SDMMC1_CMD PM1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 98 (SDMMC1_DAT3 PM2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 99 (SDMMC1_DAT2 PM3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 100 (SDMMC1_DAT1 PM4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 101 (SDMMC1_DAT0 PM5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 259 (SDMMC2_CLK): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 260 (SDMMC2_CLKB): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 261 (SDMMC2_CMD): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 262 (SDMMC2_DAT0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 263 (SDMMC2_DAT1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 264 (SDMMC2_DAT2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 265 (SDMMC2_DAT3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 266 (SDMMC2_DAT4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 267 (SDMMC2_DAT5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 268 (SDMMC2_DAT6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 269 (SDMMC2_DAT7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 270 (SDMMC2_DQS): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 271 (SDMMC2_DQSB): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 120 (SDMMC3_CLK PP0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 121 (SDMMC3_CMD PP1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 122 (SDMMC3_DAT3 PP2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 123 (SDMMC3_DAT2 PP3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 124 (SDMMC3_DAT1 PP4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 125 (SDMMC3_DAT0 PP5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 144 (CAM1_MCLK PS0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 145 (CAM2_MCLK PS1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 146 (CAM_I2C_SCL PS2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 147 (CAM_I2C_SDA PS3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 148 (CAM_RST PS4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 149 (CAM_AF_EN PS5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 150 (CAM_FLASH_EN PS6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 151 (CAM1_PWDN PS7): (MUX UNCLAIMED) tegra-gpio:151
pin 152 (CAM2_PWDN PT0): (MUX UNCLAIMED) tegra-gpio:152
pin 153 (CAM1_STROBE PT1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 160 (UART1_TX PU0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 161 (UART1_RX PU1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 162 (UART1_RTS PU2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 163 (UART1_CTS PU3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 168 (LCD_BL_PWM PV0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 169 (LCD_BL_EN PV1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 170 (LCD_RST PV2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 171 (LCD_GPIO1 PV3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 172 (LCD_GPIO2 PV4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 173 (AP_READY PV5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 174 (TOUCH_RST PV6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 175 (TOUCH_CLK PV7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 184 (MODEM_WAKE_AP PX0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 185 (TOUCH_INT PX1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 186 (MOTION_INT PX2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 187 (ALS_PROX_INT PX3): (MUX UNCLAIMED) tegra-gpio:187
pin 188 (TEMP_ALERT PX4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 189 (BUTTON_POWER_ON PX5): (MUX UNCLAIMED) tegra-gpio:189
pin 190 (BUTTON_VOL_UP PX6): (MUX UNCLAIMED) tegra-gpio:190
pin 191 (BUTTON_VOL_DOWN PX7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 192 (BUTTON_SLIDE_SW PY0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 193 (BUTTON_HOME PY1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 194 (LCD_TE PY2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 195 (PWR_I2C_SCL PY3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 196 (PWR_I2C_SDA PY4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 197 (CLK_32K_OUT PY5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 200 (PZ0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 201 (PZ1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 202 (PZ2): (MUX UNCLAIMED) tegra-gpio:202
pin 203 (PZ3): (MUX UNCLAIMED) tegra-gpio:203
pin 204 (PZ4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 205 (PZ5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 208 (DAP2_FS PAA0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 209 (DAP2_SCLK PAA1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 210 (DAP2_DIN PAA2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 211 (DAP2_DOUT PAA3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 216 (AUD_MCLK PBB0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 217 (DVFS_PWM PBB1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 218 (DVFS_CLK PBB2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 219 (GPIO_X1_AUD PBB3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 220 (GPIO_X3_AUD PBB4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 224 (HDMI_CEC PCC0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 225 (HDMI_INT_DP_HPD PCC1): (MUX UNCLAIMED) tegra-gpio:225
pin 226 (SPDIF_OUT PCC2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 227 (SPDIF_IN PCC3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 228 (USB_VBUS_EN0 PCC4): (MUX UNCLAIMED) tegra-gpio:228
pin 229 (USB_VBUS_EN1 PCC5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 230 (DP_HPD0 PCC6): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 231 (PCC7): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 232 (SPI2_CS1 PDD0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 240 (QSPI_SCK PEE0): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 241 (QSPI_CS_N PEE1): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 242 (QSPI_IO0 PEE2): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 243 (QSPI_IO1 PEE3): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 244 (QSPI_IO2 PEE4): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 245 (QSPI_IO3 PEE5): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 246 (CORE_PWR_REQ): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 247 (CPU_PWR_REQ): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 248 (PWR_INT_N): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 249 (CLK_32K_IN): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 250 (JTAG_RTCK): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 251 (BATT_BCL): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 252 (CLK_REQ): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 253 (SHUTDOWN): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 257 (PAD_DSI_AB_CONTROL): (MUX UNCLAIMED) (GPIO UNCLAIMED)
pin 258 (PAD_DSI_CD_CONTROL): (MUX UNCLAIMED) (GPIO UNCLAIMED)
root@nvidia-desktop:/sys/kernel/debug/pinctrl/700008d4.pinmux#