How to enable spi0,spi1 and spi2 on jetson tx2 EVK

how we can enable spi 0,spi1 and spi2 on jetson tx2,spi3 is bydault enable.

I have a spi flash chip and it is connected to spi bus zero,how can i write entry in device tree to access this spi flash.

any help will be appreciated.

Have a check below link

i checked the link,i am using SDK 32.4.3

what will be the pinmux configuration value for spi0 and spi1.
for spi0 i see these value
pinmux.0x0c302050 = 0x00000400; # gpio_sen1_pv1: spi2, tristate-disable, input-disable, lpdr-disable
pinmux.0x0c302058 = 0x00000454; # gpio_sen2_pv2: spi2, pull-down, tristate-enable, input-enable, lpdr-disable
pinmux.0x0c302060 = 0x00000400; # gpio_sen3_pv3: spi2, tristate-disable, input-disable, lpdr-disable
pinmux.0x0c302068 = 0x00000408; # gpio_sen4_pv4: spi2, pull-up, tristate-disable, input-disable, lpdr-disable

is it correct or i need to change above one for spi0?

i have a flash device which is connected on spi0 bus,how i will enable it?
is i have to first enable spidev0.0 or spidev0.1 on tx2 or it will directly work?

Configure below REG for SPI0

pinmux.0x0243d078 = 0x00000409; # gpio_mdm4_py3: spi1, pull-up, tristate-disable, input-disable
pinmux.0x0243d018 = 0x00000406; # gpio_wan5_ph0: spi1, pull-down, tristate-disable, input-disable
pinmux.0x0243d010 = 0x00000456; # gpio_wan6_ph1: spi1, pull-down, tristate-enable, input-enable
pinmux.0x0243d008 = 0x00000406; # gpio_wan7_ph2: spi1, pull-down, tristate-disable, input-disable
pinmux.0x0243d000 = 0x0000040a; # gpio_wan8_ph3: spi1, pull-up, tristate-disable, input-disable

Configure below REG for SPI0

pinmux.0x0243d078 = 0x00000409; # gpio_mdm4_py3: spi1, pull-up, tristate-disable, input-disable
pinmux.0x0243d018 = 0x00000406; # gpio_wan5_ph0: spi1, pull-down, tristate-disable, input-disable
pinmux.0x0243d010 = 0x00000456; # gpio_wan6_ph1: spi1, pull-down, tristate-enable, input-enable
pinmux.0x0243d008 = 0x00000406; # gpio_wan7_ph2: spi1, pull-down, tristate-disable, input-disable
pinmux.0x0243d000 = 0x0000040a; # gpio_wan8_ph3: spi1, pull-up, tristate-disable, input-disable

I am adding my spi flash devices changes in device tree as below

spi@3210000 {
status = “okay”;
spi-max-frequency = <512000>;
flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
status = “okay”;
compatible = “jedec,spi-nor”;
reg = <0>;
spi-max-frequency = <512000>;
ISP_FW@0 {
label =“ISP_FW”;
reg = <0x00 0x100000>;
};
};

    };

is it fine?

spi@3210000 {
status = “okay”;

            spi@0 {
                    compatible = "spidev";
                    reg = <0x0>;
                    spi-max-frequency = <33000000>;
                    controller-data {
                            nvidia,enable-hw-based-cs;
                            nvidia,rx-clk-tap-delay = <0x8>;
                            nvidia,tx-clk-tap-delay = <0x16>;
                    };
            };
            spi@1 {
                    compatible = "spidev";
                    reg = <0x1>;
                    spi-max-frequency = <33000000>;
                    controller-data {
                            nvidia,enable-hw-based-cs;
                            nvidia,rx-clk-tap-delay = <0x8>;
                            nvidia,tx-clk-tap-delay = <0x16>;
                    };
            };



    };

this above changes are required or not?

I am getting below error for spi flash

0.933327] spi-tegra114 3210000.spi: chipselect 0 already in use

[ 0.939449] spi_master spi0: spi_device register error /spi@3210000/flash@0
[ 0.946453] spi_master spi0: Failed to create SPI device for /spi@3210000/flash@0

You can’t have three device for two cs pins. flash@0/spi@0/spi@1

so i will declare it can you please help.
my spi flash is connected to spi0,how i can add entry for this in device tree

so you are saying i should use flash@0 and spi@0 only because it supports only two,right?

so you are saying i should use flash @0 and spi@0 only bacusase we have two cs line,right?

Yes.

i am not able to access flash,how we can verify spi signals are fine here

[ 1.075080] m25p80 spi2.0: unrecognized JEDEC id bytes: 00, 00, 00
[ 1.081273] m25p80: probe of spi2.0 failed with error -2

You can try check with the loopback test. Connect the MOSI with MISO than run the spidev_test to confirm it.

how we can find all slaves connected to particular spi bus…

There’s no any device connect to these two bus in default configuration.

what will be the pinmux configuration for spi1 and spi2

how we can read pinmux configuration of spi line dynamically at run time.

Check with below command

sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi

i am only able to spidev for spio0 and spi3 but not for spi1 and spi2,what could be the reason