how to understand "GPIO controllers with each three interrupts"?

In the document “Parker trm dp07821001p.pdf” Page sixty-nine:
He Say Six GPIO controllers with each three interrupts.

Our case, we want to use
NetName CAM0_PWDN(Pin#G8) as PinMux Function GPIO03_PR.00 as Interrupt1,like a button input.
NetName CONN_CAM0_RST_L(Pin#H8) as PinMux Function GPIO03_PR.05 as Interrupt, like a button input also.

and FlASH_EN as PinMux Function GPIO03_PX.06 , FlASH_STROBE as PinMux Function GPIO03_PV.05

all four pins as a interrupt source , just like a button input .

We also found that Power_BTN FORCE_RECOV_BTN ,VOL_DOWN as GPIO_03_PFF.00 GPIO_03_PFF.01 GPIO_03_PFF.02

Are all these interrupt source ? Can we use more than three GPIO_03 Pins as interrupt pins .

Thanks, sorry for my poor English.

Hi,

All the GPIOs are Interrupt capable.
Make sure that you configure that pin as GPIO.

thanks
Bibek

Hi,

I have max14830 IC on tx2 interface board. which doesn’t have a dedicated interrupt controller. so I connected it’s interrupt line to gpio exp0 pin. but I want to know How do I configure it in device tree?

below is the example.

 max148300: max14830@0 {
     compatible = "maxim,max14830";
     reg = <0>;
     clocks = <&xtal_max>;
     clock-names = "xtal";
     interrupt-parent = <&pinctrl_apalis_gpio1>;
     interrupts = <1 IRQ_TYPE_EDGE_FALLING>; // GPIO 1 de X23, FALLING EDGE
     spi-max-frequency = <10000000>;
     };

Can you please tell me what will be the interrupt-parent, interrupts, interrupt-parent and interrupts in that case?

hello shivlal12345,

the “interrupt-parent” property is used to specify the controller to which interrupts are routed and contains a single phandle referring to the interrupt controller node.

please refer to more details here:
https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

thanks for reply JerryChang.

Can you please also tell me how do I find out interrupt number of GPIO_EXP0 pin in order to specify it as interrupt-parent for max14830 node in device tree. we have connected max14830 interrupt line to GPIO_EXP0 pin on tx2 which is mapped to gpio@2200000 node in device tree.

hello shivlal12345,

please access the [Tegra Linux Driver Package TX2 Adaptation Guide] from the release documentation.
https://developer.nvidia.com/embedded/dlc/l4t-documentation-28-2-ga

check the [GPIO Changes] chapter to understand the GPIO mapping formula.
thanks