Issue in disabling combined UART

Hi,

I read some topics in forums and followed the below procedure:

In bootloader/t186ref/BCT/tegra194-mb1-bct-misc-flash.cfg :
-enable_combined_uart = 1;
-spe_uart_instance = 2;
+enable_combined_uart = 0;
+spe_uart_instance = 0xff;

In bootloader/t186ref/BCT/tegra194-mb1-bct-misc-l4t.cfg :
-enable_combined_uart = 1;
-spe_uart_instance = 0x2;
+enable_combined_uart = 0;
+spe_uart_instance = 0xff;

In p3668.conf.common:
-CMDLINE_ADD="console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0";
+CMDLINE_ADD="console=ttyTHS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0";

In flash.sh,
- CMDLINE_ADD="console=ttyTCU0,115200n8";
+ CMDLINE_ADD="console=ttyTHS0,115200n8";

In device tree, common/tegra194-p3668-common.dtsi :
- bootargs ="console=ttyTCU0,115200";
+ bootargs ="console=ttyTHS0,115200";

combined-uart {
console-port;
combined-uart;
- status = "okay";
+ status = "disabled";
};

With these changes, if I create a sdcard image using jetson-disk-image-creator.sh and flash development SoM, the board boots and it works fine.

But If I try to flash a production SoM, I am stuck in the following issue during flashing.

[  13.0009 ] Sending bootloader and pre-requisite binaries
[  13.0022 ] tegrarcm_v2 --download blob blob.bin
[  13.0033 ] Applet version 01.00.0000
[  13.0183 ] Sending blob
[  13.0185 ] [................................................] 100%
[  13.7927 ]
[  13.7960 ] tegrarcm_v2 --boot recovery
[  13.7983 ] Applet version 01.00.0000
[  13.8223 ]
[  14.8264 ] tegrarcm_v2 --isapplet

If I try to revert the changes in bootloader/t186ref/BCT/tegra194-mb1-bct-misc-flash.cfg and in bootloader/t186ref/BCT/tegra194-mb1-bct-misc-flash.cfg I kept the following changes and reverted the other.

-enable_combined_uart = 1;
+enable_combined_uart = 0;

I can able to flash, but during boot I faced the following issue:

[0001.165] I> EKB detected (length: 0x410) @ VA:0x52714400
ipc-unittest-main: 1519: Welcome to IPC unittest!!!
ipc-unittest-main: 1531: waiting forever
ipc-unittest-srv: 329: Init unittest services!!!
hwkey-agent: 40: hwkey-agent is running!!
hwkey-agent: 182: key_mgnt_processing .......
hwkey-agent: 157: Init hweky-agent services!!
platform_bootstrap_epilog: trusty bootstrap complete

Any ideas to debug this one? @JerryChang @WayneWWW @kayccc @jburman

Thanks,
Sakthi

1 Like

hello sakthikrishna.b,

please also refer to this similar issue Topic 160284, even though it’s for TX2.
thanks

hello sakthikrishna.b,

please have below changes for disabling combined uart on Xavier,
you should refer to below to apply several paragraph of changes.

  1. please update misc configuration file,
diff --git a/misc/tegra194-mb1-bct-misc.cfg b/misc/tegra194-mb1-bct-misc.cfg

@@ -105,8 +105,8 @@ aocluster.evp_reset_addr = 0xc480000;
 enable_sce = 0;
 enable_rce = 1;
 enable_ape = 1;
-enable_combined_uart = 1;
-spe_uart_instance = 2;
+enable_combined_uart = 0;
+spe_uart_instance = 0xff;
  1. please update device tree to disable combined UART.
diff --git a/common/tegra194-p2888-0000-a00.dtsi b/common/tegra194-p2888-0000-a00.dtsi

@@ -23,6 +23,15 @@
                status = "okay";
        };

+       serial@c280000 {
+               compatible = "nvidia,tegra20-uart";
+               clock-frequency = <0x18519600>;
+               console-port;
+               status = "okay";
+               /delete-property/ resets;
+               /delete-property/ reset-names;
+       };
+
        serial@3140000 {
                compatible = "nvidia,tegra186-hsuart";
                status = "okay";
diff --git a/common/tegra194-p2888-0001-p2822-0000-common.dtsi b/common/tegra194-p2888-0001-p2822-0000-common.dtsi

@@ -34,7 +34,8 @@
        compatible = "nvidia,galen", "nvidia,jetson-xavier", "nvidia,p2822-0000+p2888-0001", "nvidia,tegra194";

        chosen {
-               bootargs ="console=ttyTCU0,115200";
+               bootargs ="console=ttyS2,115200 earlycon=uart8250,mmio32,0x0c280000";
+               stdout-path = &uartc;
                board-has-eeprom;
        };
  1. you should also disable combined UART from kernel command line.
diff --git a/scripts/board_config/p2972-0000.conf.common b/scripts/board_config/p2972-0000.conf.common

 ROOTFSSIZE=28GiB;
- CMDLINE_ADD="console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 rootfstype=ext4";
+ CMDLINE_ADD="console=ttyS2,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 rootfstype=ext4";
  1. please disassembler the bpmp-dtb file into text for modification, please change the included header file.
diff --git a/include/platforms/bpmp-p2888-a01.dtsi b/include/platforms/bpmp-p2888-a01.dtsi

@@ -6,7 +6,7 @@
 #include "parts/uphy/tegra194-bpmp-p2888-uphy.dtsi"
 #include "parts/emc-strap/emc-p2888.dtsi"
 #include "parts/i2c/cvm-i2c-common.dtsi"
-#include "parts/policy/serial-3-comb-uart.dtsi"
+#include "parts/policy/serial-2-input.dtsi"
 #include "parts/policy/mail-common.dtsi"

diff --git a/include/platforms/bpmp-p2888-a02.dtsi b/include/platforms/bpmp-p2888-a02.dtsi

@@ -6,7 +6,7 @@
 #include "parts/uphy/tegra194-bpmp-p2888-uphy.dtsi"
 #include "parts/emc-strap/emc-p2888.dtsi"
 #include "parts/i2c/cvm-i2c-common.dtsi"
-#include "parts/policy/serial-3-comb-uart.dtsi"
+#include "parts/policy/serial-2-input.dtsi"
 #include "parts/policy/mail-common.dtsi"

diff --git a/include/platforms/bpmp-p2888-a04.dtsi b/include/platforms/bpmp-p2888-a04.dtsi

@@ -6,7 +6,7 @@
 #include "parts/uphy/tegra194-bpmp-p2888-uphy.dtsi"
 #include "parts/emc-strap/emc-p2888.dtsi"
 #include "parts/i2c/cvm-i2c-common.dtsi"
-#include "parts/policy/serial-3-comb-uart.dtsi"
+#include "parts/policy/serial-2-input.dtsi"
 #include "parts/policy/mail-common.dtsi"

Hi Jerry,

This solution is for Xavier, I have the same issue in Xavier NX.
I tried to merge your solution into Xavier NX files (tegra194-p3509-0000-a00.dtsi, tegra194-p3668-common.dtsi, tegra194-mb1-bct-misc-l4t.cfg, tegra194-mb1-bct-misc-flash.cfg) but they different
Is this solution also good for Xavier NX?

Thanks,
Yair

hello yairhav,

those changes in post #6 were patches for disabling combined UART on T194, for both Xavier and NX. there’re generic code they’re sharing.
thanks

1 Like

Hello Jerry,

Thanks for the instructions, I did all of them beside the last step related to disassembler the bpmp-dtb. I don’t have these files (no /parts folder)
Am I missing something? Should I download some SDK which not included in Jetpack package?

Thanks,
Yair

1 Like

hello yairhav,

you should also disassembler NX’s bpmp-dtb binary, tegra194-a02-bpmp-p3668-a00.dtb to have modification.
thanks

Hello Jerry,

I don’t understand step 4, please answer clearly:
1.Why I don’t have the sources of bpmp-dtb? From where I can download these files?
2. disassembler the 194-a02-bpmp-p3668-a00.dtb? and then what? What I need to change in this file?
3. Is this solution should replace the solution you proposed in step 4?
4. Did you able to complete the whole process on Xavier NX? Or this solution is derived from the xavier solution?

Forgive me about all my questions but I’m stuck on this issue for about a week.

Thanks,
Yair

hello yairhav,

it’s configuration of BPMP firmware to disable combined UART,
as you can see from L4T sources of public release source packages, we don’t release this sources for reference.

here’re commands to disassembler the dtb file into text file,
for example,
$ dtc -I dtb -O dts -o temp.dts tegra.dtb

you may exclude below from the bpmp-dtb blob to disable it,

        serial {
                port = <0x3>;
                has_input;

                combined-uart {
                        enabled;
                };
        };

you may include below for adding serial-2-input,

/ {
 	serial {
 		port = <2>;
 		has_input;
};

after that,
please execute the command to convert it into another new dtb file for verification,
for example,
$ dtc -I dts -O dtb -o new-output.dtb temp.dts

1 Like

Hi Jerry,

I did what you proposed but still the Xavier Nx stuck at kernel Init:

[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.9.140 (user@user-HP-EliteDesk-800-G4-TWR) (gcc v0
[ 0.000000] Boot CPU: AArch64 Processor [4e0f0040]
[ 0.000000] OF: fdt:memory scan node memory, reg size 48,
[ 0.000000] OF: fdt: - 80000000 , 2c000000
[ 0.000000] OF: fdt: - ac200000 , 44600000
[ 0.000000] OF: fdt: - 100000000 , 180000000
[ 0.000000] earlycon: uart8250 at MMIO32 0x000000000c280000 (options ‘’)
[ 0.000000] bootconsole [uart8250] enabled
[ 0.000000] Found tegra_fbmem: 00140000@a069c000
[ 0.000000] Found lut_mem: 00002008@a0696000

you can see that the system stuck related to the UART you asked to add in device tree at address 0x000000000c280000.

Could you please guide me step by step how to disable the combined uart in NX?

Below I summarize what steps I did according to your instruction:

  1. tegra194-mb1-bct-misc-l4t.cfg changes:

@@ -105,8 +105,8 @@ aocluster.evp_reset_addr = 0xc480000;
enable_sce = 0;
enable_rce = 1;
enable_ape = 1;
-enable_combined_uart = 1;
-spe_uart_instance = 2;
+enable_combined_uart = 0;
+spe_uart_instance = 0xff;

***Should I need to change also the tegra194-mb1-bct-misc-flash.cfg?

  1. tegra194-p2888-0000-a00.dtsi changes:

@@ -23,6 +23,15 @@
status = “okay”;
};
// Add the following
serial@c280000 {
compatible = “nvidia,tegra20-uart”;
clock-frequency = <0x18519600>;
console-port;
status = “okay”;
/delete-property/ resets;
/delete-property/ reset-names;
};

  1. tegra194-p2888-0001-p2822-0000-common.dtsi changes:

@ -34,7 +34,8 @@
compatible = “nvidia,galen”, “nvidia,jetson-xavier”, “nvidia,p2822-0000+p2888-0001”, “nvidia,tegra194”;

    chosen {
           -bootargs ="console=ttyTCU0,115200";
           +bootargs ="console=ttyS2,115200 earlycon=uart8250,mmio32,0x0c280000";
           +stdout-path = &uartc;
            board-has-eeprom;
    };
  1. p2972-0000.conf.common changes:

ROOTFSSIZE=28GiB;
-CMDLINE_ADD=“console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 rootfstype=ext4”;
+CMDLINE_ADD=“console=ttyS2,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 rootfstype=ext4”;

***Should I change also (or instead) p3668.conf.common?

  1. 194-a02-bpmp-p3668-a00.dtb changes:

// remove this part:
serial {
port = <0x3>;
has_input;

 combined-uart {
            enabled;
   };

};

// Add this part
serial {
port = <0x2>;
has_input;
};

Is this procedure are correct?

Please advice?

Thanks,
Yair

hello yairhav,

please update the NX platforms flashing configuration file, p3668.conf.common.
you may also refer to jetson-xavier-nx-devkit.conf for its configuration files.
for example,

source "${LDK_DIR}/p3668.conf.common";

Hello Jerry,

Could you share the full procedure how to disable combined UART in Xavier NX? Is this procedure has been tested on Xavier NX?

Thanks,
Yair

hello yairhav,

there’s code snippet in post #6 for disabling combined uart on T194, for both Xavier and NX.
may I know what’s your failure after update the NX platforms flashing configuration file, p3668.conf.common ?
thanks

Hello Jerry,

Is this your plan to get me give up on this issue?
I was very clear about all the procedure I did and what I got. (go back to the treading)
post #6 include step with changing sources that nvidia doesn’t released for developers.

I don’t want to try another “solution” that doesn’t even trying by you, I want solution that you tried on xavier nx and you succeeded to disabling the combined uart. this solution should be clear and practical (based only on sources that nvidia released)

yair

Yair, Does this error "[ 0.000000] Booting Linux on physical CPU 0x0
[ 0.000000] Linux version 4.9.140 (user@user-HP-EliteDesk-800-G4-TWR) (gcc v0
[ 0.000000] Boot CPU: AArch64 Processor [4e0f0040]
[ 0.000000] OF: fdt:memory scan node memory, reg size 48,
[ 0.000000] OF: fdt: - 80000000 , 2c000000
[ 0.000000] OF: fdt: - ac200000 , 44600000
[ 0.000000] OF: fdt: - 100000000 , 180000000
[ 0.000000] earlycon: uart8250 at MMIO32 0x000000000c280000 (options ‘’)
[ 0.000000] bootconsole [uart8250] enabled
[ 0.000000] Found tegra_fbmem: 00140000@a069c000
[ 0.000000] Found lut_mem: 00002008@a0696000

you can see that the system stuck related to the UART you asked to add in device tree at address 0x000000000c280000."

persist after updating p3668.conf.common?

hello @yairhav,

Jetson Xavier NX brings three UARTs out to the main connector; there’re 3 UARTs available, UART0 to M2; UART1 to 40-PIN; UART2 to debug.
you may access NX Product Design Guide , and check [Table 11-7] for Xavier NX uart pin descriptions.

you should modify misc configuration file to tell the bootloader to not use a debug UART,
in the case of using other UART# as debug UART, please change the value in kernel dts also for bootparam and serial node as current UART0.

please also refer to similar discussion thread for reference, Topic 170116.
thanks