We developed our custom carrier board. We need to control powerdown and reset functions of some ICs with 3v3 io levels. So we placed a level-shifter, TI TXS0102, and used two of Jetsons GPIOs: G8 for powerdown, and H8 for reset, as shown on scheme below.
Inside the level shifter there are embedded 10k pull-ups on each line, to 1v8 on jetson side and to 3v3 on ICs side.
So we need to pull the lines down to GND by Jetson’s G8 and H8. And we managed to do it just fine, but only with G8-pwrdn. And no mater what we do, it is always 1v8 on H8, even if the system shows the pin state as low.
We think it is because G8 has pull-down on-module, while H8 has pull-up in standard configuration. So we tried re-configure that with pinmux scripts and re-bulding the core, but with no effect.
Can you please suggest optimal pin configuration of GPIO that need to actively pull down its line? And how to correctly implement that configuration?