Issue with pulling down GPIO

Good day!

We developed our custom carrier board. We need to control powerdown and reset functions of some ICs with 3v3 io levels. So we placed a level-shifter, TI TXS0102, and used two of Jetsons GPIOs: G8 for powerdown, and H8 for reset, as shown on scheme below.

Inside the level shifter there are embedded 10k pull-ups on each line, to 1v8 on jetson side and to 3v3 on ICs side.

So we need to pull the lines down to GND by Jetson’s G8 and H8. And we managed to do it just fine, but only with G8-pwrdn. And no mater what we do, it is always 1v8 on H8, even if the system shows the pin state as low.

We think it is because G8 has pull-down on-module, while H8 has pull-up in standard configuration. So we tried re-configure that with pinmux scripts and re-bulding the core, but with no effect.

Can you please suggest optimal pin configuration of GPIO that need to actively pull down its line? And how to correctly implement that configuration?


hello lipado,

after you configure the pinmux spreadsheets, you should copy the generated *.dtsi files for conversion.
please execute dts2cfg tool, it converts pinmux, gpio and pad dts file into cfg format.
check the documentation for details, i.e. $OUT/Linux_for_Tegra/kernel/pinmux/t186/README.txt

please use the new cfg file, and perform a complete flashing process to update the board configuration.

Yeah, we did all that.

We configured H8 as pull-down output in pinmux sheet, generated the dtsi-files, converted them to cfg, build new core and flashed it to jetson. Flashing was complete.

And then, after the flashing, H8 pin is still unable to pull the line down.

We also tried pull-none drive-0 combination in pinmux, and checked another, out-of-box new jetson. The issue remains.

hello lipado,

could you please check the board configuration file and check these two pins,
for example,

pinmux.0x0243b020 = 0x00000001; # qspi_sck_pr0: rsvd1, tristate-disable, input-disable, loopback-disable
pinmux.0x0243b028 = 0x00000059; # qspi_cs_n_pr5: rsvd1, pull-up, tristate-enable, input-enable

these two pin were default used by the camera functionality, had you update device tree to eliminate these pin settings?
for example,

# cat /sys/kernel/debug/gpio | grep 456
 gpio-456 (                    |cam_pwdn_gpio       ) out lo
# cat /sys/kernel/debug/gpio | grep 461
 gpio-461 (                    |cam_reset_gpio      ) out lo

Yep, checked, those are our pins, gpio-456 and gpio-461, in default configuration. Device tree was also updated.

hello lipado,

could you please share the board configuration file of these two pins,
for example,

Hello, our .cfg file is here.
tegra186-jetson-tx2-config-strateg-pinmux-gpio.cfg (28.7 KB)

Lines for configurable pins:

pinmux.0x0243b020 = 0x00000001; # qspi_sck_pr0: rsvd1, tristate-disable, input-disable, loopback-disable
pinmux.0x0243b028 = 0x00000001; # qspi_cs_n_pr5: rsvd1, tristate-disable, input-disable

We also tried pin configurations of open-drain and bidirectional.

If pin is configured as open-drain, the jetson does not boot after flashing.

When we configured H8 as bidirectional, with pin state as n/a, it was able to pull the line down to 0v4. BUT-the G8 stopped working properly, even though we did not touched its configuration. Also after rebooting H8 was able to pull the line down only to 1v4 from 1v8. So results are still inconclusive. Even more so.

Hi lipado,
May I know what all changes have you made in kernel device tree to disable these pins to be used by camera?
Also, if you have correctly disabled then you will not see it in /sys/kernel/debug/gpio. Can you confirm?

We found out that the issue was caused by the connector. When we apply force to location of this pins, everything start working as intended.

Actually, it is not the first time we have problems with this SAMTEC connector. Glad NVIDIA switched to SODIMM260 in Xavier NX.