Jetson AGX Orin fails to boot SDMMC on L4T 36.3.0

Hi,

I am using a Jetson AGX Orin developer Kit 32GB.
With L4T 36.3.0, the board fails to boot at the SDMMC stage. However, the same hardware boots successfully with L4T 36.4.3.

Here is the boot log:

[16:50:53:481] I> MB2 (version: 0.0.0.0-t234-54845784-af79ed0a)␍␊
[16:50:53:481] I> t234-A01-1-Silicon (0x12347)␍␊
[16:50:53:489] I> Boot-mode : Coldboot␍␊
[16:50:53:489] I> Emulation: ␍␊
[16:50:53:489] I> Entry timestamp: 0x001e595f␍␊
[16:50:53:496] I> Regular heap: [base:0x40040000, size:0x10000]␍␊
[16:50:53:503] I> DMA heap: [base:0x82e000000, size:0x800000]␍␊
[16:50:53:503] I> Task: SE error check␍␊
[16:50:53:503] I> Task: Crypto init␍␊
[16:50:53:503] I> Task: MB2 Params integrity check␍␊
[16:50:53:509] I> Task: Enable CCPLEX WDT 5th expiry␍␊
[16:50:53:509] I> Task: ARI update carveout TZDRAM␍␊
[16:50:53:516] I> Task: Configure OEM set LA/PTSA values␍␊
[16:50:53:521] I> Task: Check MC errors␍␊
[16:50:53:521] I> Task: Enable hot-plug capability␍␊
[16:50:53:526] I> Task: PSC mailbox init␍␊
[16:50:53:526] I> Task: Enable clock for external modules␍␊
[16:50:53:533] I> Task: Measured Boot init␍␊
[16:50:53:533] I> Task: fTPM silicon identity init␍␊
[16:50:53:539] I> fTPM is not enabled.␍␊
[16:50:53:539] I> Task: OEM SC7 context save init␍␊
[16:50:53:544] I> Task: I2C register␍␊
[16:50:53:544] I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout␍␊
[16:50:53:550] I> Task: Program CBB PCIE AMAP regions␍␊
[16:50:53:550] I> Task: Boot device init␍␊
[16:50:53:556] I> Boot_device: QSPI_FLASH instance: 0␍␊
[16:50:53:556] I> Qspi clock source : pllc_out0␍␊
[16:50:53:562] I> QSPI Flash: Macronix 64MB␍␊
[16:50:53:562] I> QSPI-0l initialized successfully␍␊
[16:50:53:568] I> Secondary storage device: QSPI_FLASH instance: 0␍␊
[16:50:53:573] I> Secondary storage device: SDMMC_USER instance: 3␍␊
[16:50:53:595] C> Task 0x0 failed (err: 0x39390902)␍␊
[16:50:53:595] E> Top caller module: SDMMC, error module: SDMMC, reason: 0x02, aux_info: 0x09␍␊
[16:50:53:601] I> Busy Spin␍␊
[16:51:13:463] <break>
[16:51:13:520] <break>
[16:51:13:520] <0xff><0xe2>␍␊
[16:51:13:520] [0000.067] I> MB1 (version: 1.4.0.2-t234-54845784-08a4de08)␍␊
[16:51:13:529] [0000.072] I> t234-A01-1-Silicon (0x12347) Prod␍␊
[16:51:13:529] [0000.076] I> Boot-mode : Coldboot␍␊
[16:51:13:538] [0000.079] I> Entry timestamp: 0x00000000␍␊
[16:51:13:538] [0000.083] I> last_boot_error: 0x0␍␊
[16:51:13:538] [0000.086] I> BR-BCT: preprod_dev_sign: 0␍␊
[16:51:13:545] [0000.090] I> rst_source: 0x16, rst_level: 0x1␍␊
[16:51:13:553] [0000.094] I> Task: SE error check␍␊
[16:51:13:553] [0000.097] I> Task: Bootchain select WAR set␍␊
[16:51:13:558] [0000.101] I> Task: Enable SLCG␍␊
[16:51:13:558] [0000.104] I> Task: CRC check␍␊
[16:51:13:564] [0000.107] I> Task: Initialize MB2 params␍␊
[16:51:13:564] [0000.111] I> MB2-params @ 0x40060000␍␊
[16:51:13:570] [0000.115] I> Task: Crypto init␍␊
[16:51:13:578] [0000.118] I> Task: Perform MB1 KAT tests␍␊
[16:51:13:578] [0000.122] I> Task: NVRNG health check␍␊
[16:51:13:578] [0000.125] I> NVRNG: Health check success␍␊
[16:51:13:593] [0000.129] I> Task: MSS Bandwidth limiter settings for iGPU clients␍␊
[16:51:13:593] [0000.135] I> Task: Enabling and initialization of Bandwidth limiter␍␊
[16:51:13:599] [0000.141] I> No request to configure MBWT settings for any PC!␍␊
[16:51:13:606] [0000.147] I> Task: Secure debug controls␍␊
[16:51:13:606] [0000.151] I> Task: strap war set␍␊
[16:51:13:606] [0000.154] I> Task: Initialize SOC Therm␍␊
[16:51:13:613] [0000.157] I> Task: Program NV master stream id␍␊
[16:51:13:613] [0000.162] I> Task: Verify boot mode␍␊
[16:51:13:620] [0000.167] I> Task: Alias fuses␍␊
[16:51:13:627] [0000.171] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.␍␊
[16:51:13:630] [0000.178] I> Task: Print SKU type␍␊
[16:51:13:630] [0000.181] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x000001c0␍␊
[16:51:13:637] [0000.187] I> FUSE_OPT_GPC_DISABLE = 0x00000000␍␊
[16:51:13:647] [0000.191] I> FUSE_OPT_TPC_DISABLE = 0x00000080␍␊
[16:51:13:656] [0000.195] I> FUSE_OPT_DLA_DISABLE = 0x00000000␍␊
[16:51:13:656] [0000.199] I> FUSE_OPT_PVA_DISABLE = 0x00000000␍␊
[16:51:13:656] [0000.204] I> FUSE_OPT_NVENC_DISABLE = 0x00000000␍␊
[16:51:13:665] [0000.208] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000␍␊
[16:51:13:665] [0000.213] I> FUSE_OPT_FSI_DISABLE = 0x00000000␍␊
[16:51:13:674] [0000.217] I> FUSE_OPT_EMC_DISABLE = 0x00000000␍␊
[16:51:13:674] [0000.221] I> FUSE_BOOTROM_PATCH_VERSION = 0x7␍␊
[16:51:13:681] [0000.225] I> FUSE_PSCROM_PATCH_VERSION = 0x7␍␊
[16:51:13:681] [0000.229] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2␍␊
[16:51:13:697] [0000.234] I> FUSE_SKU_INFO_0 = 0xd2␍␊
[16:51:13:697] [0000.237] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS ␍␊
[16:51:13:697] [0000.241] I> FUSE_PACKAGE_INFO_0 = 0x2␍␊
[16:51:13:706] [0000.245] I> SKU: Prod␍␊
[16:51:13:706] [0000.247] I> Task: Boost clocks␍␊
[16:51:13:706] [0000.250] I> Initializing NAFLL for BPMP_CPU_NIC.␍␊
[16:51:13:706] [0000.255] I> BPMP NAFLL: fll_lock = 1, dvco_min_reached = 0␍␊
[16:51:13:714] [0000.260] I> BPMP NAFLL lock success.␍␊
[16:51:13:725] [0000.264] I> BPMP_CPU_NIC : src = 42, divisor = 0␍␊
[16:51:13:725] [0000.268] I> Initializing PLLC2 for AXI_CBB.␍␊
[16:51:13:735] [0000.273] I> AXI_CBB : src = 35, divisor = 0␍␊
[16:51:13:735] [0000.277] I> Task: Voltage monitor␍␊
[16:51:13:735] [0000.280] I> VMON: Vmon re-calibration and fine tuning done␍␊
[16:51:13:743] [0000.285] I> Task: UPHY init␍␊
[16:51:13:743] [0000.290] I> HSIO UPHY init done␍␊
[16:51:13:752] [0000.293] W> Skipping GBE UPHY config␍␊
[16:51:13:752] [0000.297] I> Task: Boot device init␍␊
[16:51:13:752] [0000.300] I> Boot_device: QSPI_FLASH instance: 0␍␊
[16:51:13:760] [0000.305] I> Qspi clock source : pllc_out0␍␊
[16:51:13:767] [0000.309] I> QSPI Flash: Macronix 64MB␍␊
[16:51:13:767] [0000.313] I> QSPI-0l initialized successfully␍␊
[16:51:13:773] [0000.317] I> Task: TSC init␍␊
[16:51:13:773] [0000.320] I> Task: Load membct␍␊
[16:51:13:781] [0000.323] I> RAM_CODE 0x4000411␍␊
[16:51:13:781] [0000.326] I> Loading MEMBCT ␍␊
[16:51:13:781] [0000.328] I> Slot: 1␍␊
[16:51:13:781] [0000.330] I> Binary[0] block-66816 (partition size: 0x40000)␍␊
[16:51:13:788] [0000.336] I> Binary name: MEM-BCT-0␍␊
[16:51:13:796] [0000.339] I> Size of crypto header is 8192␍␊
[16:51:13:801] [0000.343] I> Size of crypto header is 8192␍␊
[16:51:13:801] [0000.347] I> strt_pg_num(66816) num_of_pgs(16) read_buf(0x40050000)␍␊
[16:51:13:808] [0000.353] I> BCH of MEM-BCT-0 read from storage␍␊
[16:51:13:808] [0000.358] I> BCH address is : 0x40050000␍␊
[16:51:13:814] [0000.362] I> MEM-BCT-0 header integrity check is success␍␊
[16:51:13:820] [0000.367] I> Binary magic in BCH component 0 is MEM0␍␊
[16:51:13:827] [0000.372] I> component binary type is 0␍␊
[16:51:13:827] [0000.375] I> strt_pg_num(66832) num_of_pgs(115) read_buf(0x40040000)␍␊
[16:51:13:833] [0000.382] I> MEM-BCT-0 binary is read from storage␍␊
[16:51:13:838] [0000.387] I> MEM-BCT-0 binary integrity check is success␍␊
[16:51:13:844] [0000.392] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)␍␊
[16:51:13:850] [0000.399] I> RAM_CODE 0x4000411␍␊
[16:51:13:857] [0000.404] I> RAM_CODE 0x4000411␍␊
[16:51:13:857] [0000.408] I> Task: Load Page retirement list␍␊
[16:51:13:862] [0000.412] I> Task: SDRAM params override␍␊
[16:51:13:868] [0000.416] I> Task: Save mem-bct info␍␊
[16:51:13:868] [0000.419] I> Task: Carveout allocate␍␊
[16:51:13:874] [0000.423] I> RCM blob carveout will not be allocated␍␊
[16:51:13:879] [0000.428] I> Update CCPLEX IST carveout from MB1-BCT␍␊
[16:51:13:885] [0000.433] I> ECC region[0]: Start:0x0, End:0x0␍␊
[16:51:13:885] [0000.437] I> ECC region[1]: Start:0x0, End:0x0␍␊
[16:51:13:890] [0000.441] I> ECC region[2]: Start:0x0, End:0x0␍␊
[16:51:13:896] [0000.445] I> ECC region[3]: Start:0x0, End:0x0␍␊
[16:51:13:902] [0000.450] I> ECC region[4]: Start:0x0, End:0x0␍␊
[16:51:13:907] [0000.454] I> Non-ECC region[0]: Start:0x80000000, End:0x880000000␍␊
[16:51:13:913] [0000.460] I> Non-ECC region[1]: Start:0x0, End:0x0␍␊
[16:51:13:913] [0000.464] I> Non-ECC region[2]: Start:0x0, End:0x0␍␊
[16:51:13:918] [0000.469] I> Non-ECC region[3]: Start:0x0, End:0x0␍␊
[16:51:13:924] [0000.474] I> Non-ECC region[4]: Start:0x0, End:0x0␍␊
[16:51:13:936] [0000.484] I> allocated(CO:44) base:0x849800000 size:0x36800000 align: 0x100000␍␊
[16:51:13:941] [0000.492] I> allocated(CO:31) base:0x840000000 size:0x8000000 align: 0x8000000␍␊
[16:51:13:947] [0000.499] I> allocated(CO:43) base:0x83c000000 size:0x4000000 align: 0x200000␍␊
[16:51:13:958] [0000.506] I> allocated(CO:39) base:0x839e00000 size:0x2200000 align: 0x10000␍␊
[16:51:13:964] [0000.513] I> allocated(CO:20) base:0x836000000 size:0x2000000 align: 0x2000000␍␊
[16:51:13:969] [0000.520] I> allocated(CO:24) base:0x834000000 size:0x2000000 align: 0x2000000␍␊
[16:51:13:975] [0000.527] I> allocated(CO:28) base:0x832000000 size:0x2000000 align: 0x2000000␍␊
[16:51:13:986] [0000.534] I> allocated(CO:29) base:0x830000000 size:0x2000000 align: 0x2000000␍␊
[16:51:13:992] [0000.541] I> allocated(CO:22) base:0x848000000 size:0x1000000 align: 0x1000000␍␊
[16:51:13:998] [0000.548] I> allocated(CO:35) base:0x838e00000 size:0x1000000 align: 0x100000␍␊
[16:51:14:009] [0000.555] I> allocated(CO:41) base:0x82f000000 size:0x1000000 align: 0x100000␍␊
[16:51:14:014] [0000.562] I> allocated(CO:02) base:0x849000000 size:0x800000 align: 0x800000␍␊
[16:51:14:020] [0000.569] I> allocated(CO:03) base:0x838000000 size:0x800000 align: 0x800000␍␊
[16:51:14:026] [0000.576] I> allocated(CO:06) base:0x82e800000 size:0x800000 align: 0x800000␍␊
[16:51:14:031] [0000.583] I> allocated(CO:56) base:0x82e000000 size:0x800000 align: 0x200000␍␊
[16:51:14:042] [0000.590] I> allocated(CO:07) base:0x838800000 size:0x400000 align: 0x400000␍␊
[16:51:14:048] [0000.597] I> allocated(CO:33) base:0x82dc00000 size:0x400000 align: 0x200000␍␊
[16:51:14:054] [0000.604] I> allocated(CO:19) base:0x82d980000 size:0x280000 align: 0x10000␍␊
[16:51:14:059] [0000.611] I> allocated(CO:23) base:0x838c00000 size:0x200000 align: 0x200000␍␊
[16:51:14:071] [0000.618] I> allocated(CO:01) base:0x82d800000 size:0x100000 align: 0x100000␍␊
[16:51:14:076] [0000.625] I> allocated(CO:05) base:0x82d700000 size:0x100000 align: 0x100000␍␊
[16:51:14:082] [0000.632] I> allocated(CO:08) base:0x82d600000 size:0x100000 align: 0x100000␍␊
[16:51:14:088] [0000.639] I> allocated(CO:09) base:0x82d500000 size:0x100000 align: 0x100000␍␊
[16:51:14:099] [0000.646] I> allocated(CO:12) base:0x82d400000 size:0x100000 align: 0x100000␍␊
[16:51:14:104] [0000.653] I> allocated(CO:15) base:0x82d300000 size:0x100000 align: 0x100000␍␊
[16:51:14:110] [0000.659] I> allocated(CO:17) base:0x82d200000 size:0x100000 align: 0x100000␍␊
[16:51:14:116] [0000.666] I> allocated(CO:27) base:0x82d100000 size:0x100000 align: 0x100000␍␊
[16:51:14:127] [0000.673] I> allocated(CO:42) base:0x82d000000 size:0x100000 align: 0x100000␍␊
[16:51:14:132] [0000.680] I> allocated(CO:54) base:0x82d900000 size:0x80000 align: 0x80000␍␊
[16:51:14:138] [0000.687] I> allocated(CO:34) base:0x82cff0000 size:0x10000 align: 0x10000␍␊
[16:51:14:144] [0000.694] I> allocated(CO:72) base:0x82cdf0000 size:0x200000 align: 0x10000␍␊
[16:51:14:149] [0000.701] I> allocated(CO:47) base:0x82c800000 size:0x400000 align: 0x200000␍␊
[16:51:14:161] [0000.708] I> allocated(CO:50) base:0x82c600000 size:0x200000 align: 0x100000␍␊
[16:51:14:166] [0000.715] I> allocated(CO:52) base:0x82cdc0000 size:0x30000 align: 0x10000␍␊
[16:51:14:172] [0000.721] I> allocated(CO:48) base:0x82cda0000 size:0x20000 align: 0x10000␍␊
[16:51:14:178] [0000.728] I> allocated(CO:69) base:0x82cd80000 size:0x20000 align: 0x10000␍␊
[16:51:14:183] [0000.735] I> allocated(CO:49) base:0x82cd70000 size:0x10000 align: 0x10000␍␊
[16:51:14:194] [0000.742] I> NSDRAM base: 0x80000000, end: 0x82cdf0000, size: 0x7acdf0000␍␊
[16:51:14:200] [0000.748] I> Task: Thermal check␍␊
[16:51:14:200] [0000.751] I> Using min_chip_limit as min_tmon_limit␍␊
[16:51:14:206] [0000.756] I> Using max_chip_limit as max_tmon_limit␍␊
[16:51:14:211] [0000.761] I> BCT max_tmon_limit = 105␍␊
[16:51:14:217] [0000.764] I> BCT min_tmon_limit = -28␍␊
[16:51:14:217] [0000.768] I> BCT max_tmon_limit = 105␍␊
[16:51:14:222] [0000.771] I> BCT min_tmon_limit = -28␍␊
[16:51:14:228] [0000.775] I> SKU specific max_chip_limit = 105␍␊
[16:51:14:228] [0000.779] I> SKU specific min_chip_limit = -28␍␊
[16:51:14:234] [0000.783] I> BCT max_chip_limit = 105␍␊
[16:51:14:240] [0000.787] I> BCT min_chip_limit = -28␍␊
[16:51:14:240] [0000.790] I> enable_soctherm_polling = 0␍␊
[16:51:14:245] [0000.794] I> max temp read = 36␍␊
[16:51:14:251] [0000.797] I> min temp read = 36␍␊
[16:51:14:251] [0000.800] I> Enabling thermtrip␍␊
[16:51:14:257] [0000.803] I> Task: Update FSI SCR with thermal fuse data␍␊
[16:51:14:263] [0000.808] I> Task: Enable WDT 5th expiry␍␊
[16:51:14:263] [0000.812] I> Task: I2C register␍␊
[16:51:14:268] [0000.815] I> Task: Set I2C bus freq␍␊
[16:51:14:268] [0000.818] I> Task: Reset FSI␍␊
[16:51:14:274] [0000.821] I> Task: Pinmux init␍␊
[16:51:14:274] [0000.824] I> Task: Prod config init␍␊
[16:51:14:280] [0000.828] I> Task: Pad voltage init␍␊
[16:51:14:286] [0000.831] I> Task: Prod init␍␊
[16:51:14:286] [0000.834] I> Task: Program rst req config reg␍␊
[16:51:14:291] [0000.838] I> Task: Common rail init␍␊
[16:51:14:291] [0000.841] I> DONE: Thermal config␍␊
[16:51:14:297] [0000.845] W> DEVICE_PROD: module = 13, instance = 4 not found in device prod.␍␊
[16:51:14:303] [0000.853] I> DONE: SOC rail config␍␊
[16:51:14:309] [0000.857] W> PMIC_CONFIG: Rail: MEMIO rail config not found in MB1 BCT.␍␊
[16:51:14:315] [0000.863] I> DONE: MEMIO rail config␍␊
[16:51:14:321] [0000.867] I> DONE: GPU rail info␍␊
[16:51:14:321] [0000.870] I> DONE: CV rail info␍␊
[16:51:14:327] [0000.873] I> Task: Mem clock src␍␊
[16:51:14:327] [0000.876] I> Task: Misc. board config␍␊
[16:51:14:332] [0000.880] I> PMIC_CONFIG: Platform config not found in MB1 BCT.␍␊
[16:51:14:338] [0000.886] I> Task: SDRAM init␍␊
[16:51:14:338] [0000.888] I> MemoryType: 4 MemBctRevision: 9␍␊
[16:51:14:346] [0000.895] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 9␍␊
[16:51:14:351] [0000.903] I> MSS CAR: Init PLLM␍␊
[16:51:14:359] [0000.906] I> MSS CAR: Init PLLHUB␍␊
[16:51:14:359] [0000.910] I> Encryption:   MTS: en, TX: en, VPR: en, GSC: en␍␊
[16:51:14:370] [0000.922] I> SDRAM initialized!␍␊
[16:51:14:376] [0000.925] I> SDRAM Size in Total 0x800000000␍␊
[16:51:14:381] [0000.929] I> Task: Dram Ecc scrub␍␊
[16:51:14:381] [0000.932] I> Task: DRAM alias check␍␊
[16:51:14:394] [0000.942] I> Task: Program NSDRAM carveout␍␊
[16:51:14:399] [0000.946] I> NSDRAM carveout encryption is enabled␍␊
[16:51:14:399] [0000.951] I> Program NSDRAM carveout␍␊
[16:51:14:405] [0000.954] I> Task: Register checker␍␊
[16:51:14:422] [0000.958] I> Task: Enable clock-mon␍␊
[16:51:14:422] [0000.972] I> FMON: Fmon re-programming done␍␊
[16:51:14:427] [0000.976] I> Task: Mapper init␍␊
[16:51:14:427] [0000.979] I> Task: SC7 Context Init␍␊
[16:51:14:433] [0000.982] I> Task: CCPLEX IST init␍␊
[16:51:14:439] [0000.986] I> Task: CPU WP0␍␊
[16:51:14:439] [0000.989] I> Loading MCE␍␊
[16:51:14:439] [0000.991] I> Slot: 1␍␊
[16:51:14:445] [0000.993] I> Binary[8] block-85760 (partition size: 0x80000)␍␊
[16:51:14:450] [0000.999] I> Binary name: MCE␍␊
[16:51:14:450] [0001.001] I> Size of crypto header is 8192␍␊
[16:51:14:456] [0001.005] I> Size of crypto header is 8192␍␊
[16:51:14:462] [0001.009] I> strt_pg_num(85760) num_of_pgs(16) read_buf(0x4003e000)␍␊
[16:51:14:467] [0001.016] I> BCH of MCE read from storage␍␊
[16:51:14:467] [0001.019] I> BCH address is : 0x4003e000␍␊
[16:51:14:473] [0001.023] I> MCE header integrity check is success␍␊
[16:51:14:479] [0001.028] I> Binary magic in BCH component 0 is MTSM␍␊
[16:51:14:484] [0001.033] I> component binary type is 8␍␊
[16:51:14:490] [0001.036] I> Size of crypto header is 8192␍␊
[16:51:14:490] [0001.040] I> strt_pg_num(85776) num_of_pgs(350) read_buf(0x40000000)␍␊
[16:51:14:498] [0001.049] I> MCE binary is read from storage␍␊
[16:51:14:504] [0001.053] I> MCE binary integrity check is success␍␊
[16:51:14:509] [0001.058] I> Binary MCE loaded successfully at 0x40000000 (0x2baf0)␍␊
[16:51:14:515] [0001.064] I> Size of crypto header is 8192␍␊
[16:51:14:527] [0001.075] I> Size of crypto header is 8192␍␊
[16:51:14:527] [0001.079] I> Sending WP0 mailbox command to PSC␍␊
[16:51:14:538] [0001.088] I> Task: XUSB Powergate␍␊
[16:51:14:543] [0001.091] I> Skipping powergate XUSB.␍␊
[16:51:14:543] [0001.095] I> Task: MB1 fixed firewalls␍␊
[16:51:14:552] [0001.101] W> Firewall readback mismatch␍␊
[16:51:14:559] [0001.106] I> Task: Load bpmp-fw␍␊
[16:51:14:559] [0001.109] I> Slot: 1␍␊
[16:51:14:564] [0001.111] I> Binary[15] block-72960 (partition size: 0x180000)␍␊
[16:51:14:570] [0001.117] I> Binary name: BPMP_FW␍␊
[16:51:14:570] [0001.120] I> Size of crypto header is 8192␍␊
[16:51:14:575] [0001.124] I> Size of crypto header is 8192␍␊
[16:51:14:581] [0001.128] I> strt_pg_num(72960) num_of_pgs(16) read_buf(0x807fe000)␍␊
[16:51:14:587] [0001.134] I> BCH of BPMP_FW read from storage␍␊
[16:51:14:587] [0001.138] I> BCH address is : 0x807fe000␍␊
[16:51:14:592] [0001.142] I> BPMP_FW header integrity check is success␍␊
[16:51:14:599] [0001.147] I> Binary magic in BCH component 0 is BPMF␍␊
[16:51:14:605] [0001.152] I> component binary type is 15␍␊
[16:51:14:605] [0001.156] I> Size of crypto header is 8192␍␊
[16:51:14:611] [0001.159] I> strt_pg_num(72976) num_of_pgs(1990) read_buf(0x80000000)␍␊
[16:51:14:626] [0001.177] I> BPMP_FW binary is read from storage␍␊
[16:51:14:634] [0001.183] I> BPMP_FW binary integrity check is success␍␊
[16:51:14:643] [0001.188] I> Binary BPMP_FW loaded successfully at 0x80000000 (0xf8bc0)␍␊
[16:51:14:651] [0001.195] I> Slot: 1␍␊
[16:51:14:651] [0001.197] I> Binary[16] block-76032 (partition size: 0x400000)␍␊
[16:51:14:660] [0001.203] I> Binary name: BPMP_FW_DTB␍␊
[16:51:14:660] [0001.206] I> Size of crypto header is 8192␍␊
[16:51:14:673] [0001.210] I> Size of crypto header is 8192␍␊
[16:51:14:673] [0001.214] I> strt_pg_num(76032) num_of_pgs(16) read_buf(0x807fc000)␍␊
[16:51:14:682] [0001.220] I> BCH of BPMP_FW_DTB read from storage␍␊
[16:51:14:682] [0001.225] I> BCH address is : 0x807fc000␍␊
[16:51:14:682] [0001.229] I> BPMP_FW_DTB header integrity check is success␍␊
[16:51:14:691] [0001.234] I> Binary magic in BCH component 0 is BPMD␍␊
[16:51:14:691] [0001.239] I> component binary type is 16␍␊
[16:51:14:698] [0001.242] I> Size of crypto header is 8192␍␊
[16:51:14:698] [0001.246] I> strt_pg_num(76048) num_of_pgs(736) read_buf(0x8079fff0)␍␊
[16:51:14:707] [0001.257] I> BPMP_FW_DTB binary is read from storage␍␊
[16:51:14:715] [0001.262] I> BPMP_FW_DTB binary integrity check is success␍␊
[16:51:14:724] [0001.268] I> Binary BPMP_FW_DTB loaded successfully at 0x8079fff0 (0x5bf00)␍␊
[16:51:14:724] [0001.275] I> Task: BPMP fw ast config␍␊
[16:51:14:732] [0001.278] I> Task: Load psc-fw␍␊
[16:51:14:741] [0001.281] I> Slot: 1␍␊
[16:51:14:741] [0001.283] I> Binary[17] block-84224 (partition size: 0xc0000)␍␊
[16:51:14:741] [0001.289] I> Binary name: PSC_FW␍␊
[16:51:14:741] [0001.292] I> Size of crypto header is 8192␍␊
[16:51:14:750] [0001.296] I> Size of crypto header is 8192␍␊
[16:51:14:760] [0001.299] I> strt_pg_num(84224) num_of_pgs(16) read_buf(0x80ffe000)␍␊
[16:51:14:760] [0001.306] I> BCH of PSC_FW read from storage␍␊
[16:51:14:769] [0001.310] I> BCH address is : 0x80ffe000␍␊
[16:51:14:769] [0001.314] I> PSC_FW header integrity check is success␍␊
[16:51:14:769] [0001.319] I> Binary magic in BCH component 0 is PFWP␍␊
[16:51:14:776] [0001.323] I> component binary type is 17␍␊
[16:51:14:785] [0001.327] I> Size of crypto header is 8192␍␊
[16:51:14:785] [0001.331] I> strt_pg_num(84240) num_of_pgs(591) read_buf(0x80fb4200)␍␊
[16:51:14:794] [0001.341] I> PSC_FW binary is read from storage␍␊
[16:51:14:794] [0001.346] I> PSC_FW binary integrity check is success␍␊
[16:51:14:804] [0001.351] I> Binary PSC_FW loaded successfully at 0x80fb4200 (0x49df0)␍␊
[16:51:14:813] [0001.357] I> Task: Load nvdec-fw␍␊
[16:51:14:813] [0001.360] I> Slot: 1␍␊
[16:51:14:813] [0001.362] I> Binary[7] block-69376 (partition size: 0x100000)␍␊
[16:51:14:823] [0001.368] I> Binary name: NVDEC␍␊
[16:51:14:823] [0001.371] I> Size of crypto header is 8192␍␊
[16:51:14:831] [0001.375] I> Size of crypto header is 8192␍␊
[16:51:14:831] [0001.378] I> strt_pg_num(69376) num_of_pgs(16) read_buf(0x800fe000)␍␊
[16:51:14:842] [0001.385] I> BCH of NVDEC read from storage␍␊
[16:51:14:842] [0001.389] I> BCH address is : 0x800fe000␍␊
[16:51:14:852] [0001.393] I> NVDEC header integrity check is success␍␊
[16:51:14:852] [0001.397] I> Binary magic in BCH component 0 is NDEC␍␊
[16:51:14:852] [0001.402] I> component binary type is 7␍␊
[16:51:14:861] [0001.406] I> Size of crypto header is 8192␍␊
[16:51:14:870] [0001.410] I> strt_pg_num(69392) num_of_pgs(560) read_buf(0x80000000)␍␊
[16:51:14:876] [0001.419] I> NVDEC binary is read from storage␍␊
[16:51:14:882] [0001.424] I> NVDEC binary integrity check is success␍␊
[16:51:14:882] [0001.429] I> Binary NVDEC loaded successfully at 0x80000000 (0x46000)␍␊
[16:51:14:895] [0001.435] I> Size of crypto header is 8192␍␊
[16:51:14:895] [0001.447] I> Task: Load tsec-fw␍␊
[16:51:14:901] [0001.450] I> TSEC-FW load support not enabled␍␊
[16:51:14:907] [0001.454] I> Task: GPIO interrupt map␍␊
[16:51:14:907] [0001.458] I> Task: SC7 context save␍␊
[16:51:14:913] [0001.461] I> Slot: 1␍␊
[16:51:14:913] [0001.463] I> Binary[27] block-0 (partition size: 0x100000)␍␊
[16:51:14:919] [0001.468] I> Binary name: BR_BCT␍␊
[16:51:14:926] [0001.471] I> Size of crypto header is 8192␍␊
[16:51:14:926] [0001.475] I> Size of crypto header is 8192␍␊
[16:51:14:933] [0001.479] I> Size of crypto header is 8192␍␊
[16:51:14:939] [0001.483] I> strt_pg_num(0) num_of_pgs(16) read_buf(0xa0000000)␍␊
[16:51:14:945] [0001.489] I> BR_BCT binary is read from storage␍␊
[16:51:14:950] [0001.493] I> BR_BCT binary integrity check is success␍␊
[16:51:14:956] [0001.498] I> Binary BR_BCT loaded successfully at 0xa0000000 (0x2000)␍␊
[16:51:14:961] [0001.505] I> Slot: 1␍␊
[16:51:14:961] [0001.507] I> Binary[13] block-86784 (partition size: 0x30000)␍␊
[16:51:14:967] [0001.512] I> Binary name: SC7-FW␍␊
[16:51:14:974] [0001.515] I> Size of crypto header is 8192␍␊
[16:51:14:974] [0001.519] I> Size of crypto header is 8192␍␊
[16:51:14:981] [0001.523] I> Size of crypto header is 8192␍␊
[16:51:14:981] [0001.527] I> Size of crypto header is 8192␍␊
[16:51:14:981] [0001.531] I> strt_pg_num(86784) num_of_pgs(16) read_buf(0xa0002000)␍␊
[16:51:14:988] [0001.537] I> BCH of SC7-FW read from storage␍␊
[16:51:14:996] [0001.541] I> BCH address is : 0xa0002000␍␊
[16:51:15:002] [0001.545] I> SC7-FW header integrity check is success␍␊
[16:51:15:002] [0001.550] I> Binary magic in BCH component 0 is WB0B␍␊
[16:51:15:009] [0001.555] I> component binary type is 13␍␊
[16:51:15:009] [0001.559] I> Size of crypto header is 8192␍␊
[16:51:15:017] [0001.563] I> strt_pg_num(86800) num_of_pgs(349) read_buf(0xa0004000)␍␊
[16:51:15:024] [0001.571] I> SC7-FW binary is read from storage␍␊
[16:51:15:033] [0001.576] I> SC7-FW binary integrity check is success␍␊
[16:51:15:033] [0001.580] I> Binary SC7-FW loaded successfully at 0xa0004000 (0x2b920)␍␊
[16:51:15:042] [0001.587] I> Slot: 1␍␊
[16:51:15:042] [0001.589] I> Binary[22] block-87168 (partition size: 0x30000)␍␊
[16:51:15:051] [0001.594] I> Binary name: PSC_RF␍␊
[16:51:15:051] [0001.598] I> Size of crypto header is 8192␍␊
[16:51:15:059] [0001.601] I> Size of crypto header is 8192␍␊
[16:51:15:059] [0001.605] I> Size of crypto header is 8192␍␊
[16:51:15:065] [0001.609] I> Size of crypto header is 8192␍␊
[16:51:15:076] [0001.613] I> strt_pg_num(87168) num_of_pgs(16) read_buf(0xa002f920)␍␊
[16:51:15:076] [0001.620] I> BCH of PSC_RF read from storage␍␊
[16:51:15:076] [0001.624] I> BCH address is : 0xa002f920␍␊
[16:51:15:085] [0001.627] I> PSC_RF header integrity check is success␍␊
[16:51:15:085] [0001.632] I> Binary magic in BCH component 0 is PSCR␍␊
[16:51:15:095] [0001.637] I> component binary type is 22␍␊
[16:51:15:095] [0001.641] I> Size of crypto header is 8192␍␊
[16:51:15:095] [0001.645] I> strt_pg_num(87184) num_of_pgs(224) read_buf(0xa0031920)␍␊
[16:51:15:108] [0001.652] I> PSC_RF binary is read from storage␍␊
[16:51:15:108] [0001.657] I> PSC_RF binary integrity check is success␍␊
[16:51:15:119] [0001.662] I> Binary PSC_RF loaded successfully at 0xa0031920 (0x1be60)␍␊
[16:51:15:129] [0001.671] I> Task: Save WP0 payload to SC7 ctx␍␊
[16:51:15:129] [0001.676] I> Task: Load MB2rf binary to SC7 ctx␍␊
[16:51:15:138] [0001.680] I> Slot: 1␍␊
[16:51:15:138] [0001.682] I> Binary[14] block-87552 (partition size: 0x20000)␍␊
[16:51:15:138] [0001.688] I> Binary name: MB2_RF␍␊
[16:51:15:148] [0001.691] I> Size of crypto header is 8192␍␊
[16:51:15:148] [0001.695] I> Size of crypto header is 8192␍␊
[16:51:15:157] [0001.699] I> Size of crypto header is 8192␍␊
[16:51:15:157] [0001.702] I> Size of crypto header is 8192␍␊
[16:51:15:157] [0001.706] I> strt_pg_num(87552) num_of_pgs(16) read_buf(0xa00d5d10)␍␊
[16:51:15:165] [0001.713] I> BCH of MB2_RF read from storage␍␊
[16:51:15:174] [0001.717] I> BCH address is : 0xa00d5d10␍␊
[16:51:15:174] [0001.721] I> MB2_RF header integrity check is success␍␊
[16:51:15:184] [0001.725] I> Binary magic in BCH component 0 is MB2R␍␊
[16:51:15:184] [0001.730] I> component binary type is 14␍␊
[16:51:15:184] [0001.734] I> Size of crypto header is 8192␍␊
[16:51:15:193] [0001.738] I> strt_pg_num(87568) num_of_pgs(224) read_buf(0xa00d7d10)␍␊
[16:51:15:202] [0001.746] I> MB2_RF binary is read from storage␍␊
[16:51:15:202] [0001.750] I> MB2_RF binary integrity check is success␍␊
[16:51:15:211] [0001.755] I> Binary MB2_RF loaded successfully at 0xa00d7d10 (0x1bf30)␍␊
[16:51:15:221] [0001.761] I> Task: Save fuse alias data to SC7 ctx␍␊
[16:51:15:221] [0001.766] I> Task: Save PMIC data to SC7 ctx␍␊
[16:51:15:221] [0001.770] I> Task: Save Pinmux data to SC7 ctx␍␊
[16:51:15:230] [0001.774] I> Task: Save Pad Voltage data to SC7 ctx␍␊
[16:51:15:230] [0001.779] I> Task: Save controller prod data to SC7 ctx␍␊
[16:51:15:240] [0001.784] I> Task: Save prod cfg data to SC7 ctx␍␊
[16:51:15:249] [0001.789] I> Task: Save I2C bus freq data to SC7 ctx␍␊
[16:51:15:249] [0001.793] I> Task: Save SOCTherm data to SC7 ctx␍␊
[16:51:15:249] [0001.798] I> Task: Save FMON data to SC7 ctx␍␊
[16:51:15:257] [0001.802] I> Task: Save VMON data to SC7 ctx␍␊
[16:51:15:264] [0001.806] I> Task: Save TZDRAM data to SC7 ctx␍␊
[16:51:15:264] [0001.810] I> Task: Save GPIO int data to SC7 ctx␍␊
[16:51:15:264] [0001.815] I> Task: Save clock data to SC7 ctx␍␊
[16:51:15:272] [0001.819] I> Task: Save debug data to SC7 ctx␍␊
[16:51:15:279] [0001.823] I> Task: Save MBWT data to SC7 ctx␍␊
[16:51:15:284] [0001.831] I> SC7 context save done␍␊
[16:51:15:284] [0001.835] I> Task: Load MB2/Applet/FSKP␍␊
[16:51:15:291] [0001.838] I> Loading MB2␍␊
[16:51:15:291] [0001.841] I> Slot: 1␍␊
[16:51:15:297] [0001.843] I> Binary[6] block-71424 (partition size: 0x80000)␍␊
[16:51:15:306] [0001.848] I> Binary name: MB2␍␊
[16:51:15:306] [0001.851] I> Size of crypto header is 8192␍␊
[16:51:15:313] [0001.855] I> Size of crypto header is 8192␍␊
[16:51:15:313] [0001.859] I> strt_pg_num(71424) num_of_pgs(16) read_buf(0x8007e000)␍␊
[16:51:15:320] [0001.865] I> BCH of MB2 read from storage␍␊
[16:51:15:320] [0001.869] I> BCH address is : 0x8007e000␍␊
[16:51:15:326] [0001.873] I> MB2 header integrity check is success␍␊
[16:51:15:332] [0001.877] I> Binary magic in BCH component 0 is MB2B␍␊
[16:51:15:339] [0001.882] I> component binary type is 6␍␊
[16:51:15:339] [0001.886] I> Size of crypto header is 8192␍␊
[16:51:15:345] [0001.890] I> strt_pg_num(71440) num_of_pgs(844) read_buf(0x80000000)␍␊
[16:51:15:351] [0001.901] I> MB2 binary is read from storage␍␊
[16:51:15:357] [0001.906] I> MB2 binary integrity check is success␍␊
[16:51:15:362] [0001.910] I> Binary MB2 loaded successfully at 0x80000000 (0x696a0)␍␊
[16:51:15:368] [0001.917] I> Task: Map CCPLEX SHARED carveout␍␊
[16:51:15:375] [0001.921] I> Task: Prepare MB2 params␍␊
[16:51:15:375] [0001.925] I> Task: Dram ecc test␍␊
[16:51:15:382] [0001.928] I> Task: Misc NV security settings␍␊
[16:51:15:390] [0001.932] I> NVDEC sticky bits programming done␍␊
[16:51:15:390] [0001.936] I> Successfully powergated NVDEC␍␊
[16:51:15:397] [0001.940] I> Task: Disable/Reload WDT␍␊
[16:51:15:397] [0001.944] I> Task: Program misc carveouts␍␊
[16:51:15:397] [0001.948] I> Program IPC carveouts␍␊
[16:51:15:404] [0001.951] I> Task: Disable SCPM/POD reset␍␊
[16:51:15:412] [0001.955] I> SLCG Global override status := 0x0␍␊
[16:51:15:412] [0001.959] I> MB1: MSS reconfig completed␍␊
[16:51:15:468] I> MB2 (version: 0.0.0.0-t234-54845784-af79ed0a)␍␊
[16:51:15:468] I> t234-A01-1-Silicon (0x12347)␍␊
[16:51:15:478] I> Boot-mode : Coldboot␍␊
[16:51:15:478] I> Emulation: ␍␊
[16:51:15:478] I> Entry timestamp: 0x001e5c5e␍␊
[16:51:15:489] I> Regular heap: [base:0x40040000, size:0x10000]␍␊
[16:51:15:489] I> DMA heap: [base:0x82e000000, size:0x800000]␍␊
[16:51:15:489] I> Task: SE error check␍␊
[16:51:15:498] I> Task: Crypto init␍␊
[16:51:15:498] I> Task: MB2 Params integrity check␍␊
[16:51:15:498] I> Task: Enable CCPLEX WDT 5th expiry␍␊
[16:51:15:498] I> Task: ARI update carveout TZDRAM␍␊
[16:51:15:505] I> Task: Configure OEM set LA/PTSA values␍␊
[16:51:15:512] I> Task: Check MC errors␍␊
[16:51:15:512] I> Task: Enable hot-plug capability␍␊
[16:51:15:517] I> Task: PSC mailbox init␍␊
[16:51:15:517] I> Task: Enable clock for external modules␍␊
[16:51:15:523] I> Task: Measured Boot init␍␊
[16:51:15:523] I> Task: fTPM silicon identity init␍␊
[16:51:15:529] I> fTPM is not enabled.␍␊
[16:51:15:529] I> Task: OEM SC7 context save init␍␊
[16:51:15:535] I> Task: I2C register␍␊
[16:51:15:535] I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout␍␊
[16:51:15:541] I> Task: Program CBB PCIE AMAP regions␍␊
[16:51:15:541] I> Task: Boot device init␍␊
[16:51:15:547] I> Boot_device: QSPI_FLASH instance: 0␍␊
[16:51:15:547] I> Qspi clock source : pllc_out0␍␊
[16:51:15:547] I> QSPI Flash: Macronix 64MB␍␊
[16:51:15:547] I> QSPI-0l initialized successfully␍␊
[16:51:15:553] I> Secondary storage device: QSPI_FLASH instance: 0␍␊
[16:51:15:559] I> Secondary storage device: SDMMC_USER instance: 3␍␊
[16:51:15:583] C> Task 0x0 failed (err: 0x39390902)␍␊
[16:51:15:583] E> Top caller module: SDMMC, error module: SDMMC, reason: 0x02, aux_info: 0x09␍␊
[16:51:15:588] I> Busy Spin␍␊

I would like to know what could cause this SDMMC error in L4T 36.3.0, and whether there are any known differences between 36.3.0 and 36.4.3 related to SDMMC/MB2.

Thanks.

Hi,

Please refer to Log in | NVIDIA Developer to get the corresponding PCN.

Thanks