JETSON AGX XAVIER custom 40Pin Header overlay for ADIS16448 IIO kernel module

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
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1

Hi all. I am trying since a while now to add the kernel module from the IIO driver library for the ADIS16448 IMU to the Jetson Xavier AGX. It should connect to the SPI on the 40 Pin Header and use a GPIO as a data ready pin in addition. It does compile properly. But when I add and enable my device tree overlay for it, the Xavier does not boot anymore with the new configuration: it goes completely dark after startup, blank screen and all peripherals disabled (Ethernet etc). So it is completely dead, and I can not see what exactly the reason for this is. I strongly suspect the overlay file.
I am using Ubuntu 20.04.6 LTS with the GNU/Linux 5.10.104-tegra aarch64 kernel.

This is my overlay file:

/dts-v1/;
/plugin/;

#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>



/* Device tree overlay to add an ADIS16448 IMU to the Jetson Xavier on SPI0 */
/ {
    overlay-name = "ADIS16448 Jetson overlay";
    jetson-header-name = "Jetson 40pin Header";
    compatible = "nvidia,p2822-0000+p2888-0001";

        fragment@0 {
        target-path = "/spi@3210000/spi@0"; /* Obtained via decompiling the device tree */

                __overlay__ {
                        status = "disabled";
                };
        };

    fragment@1 {
        target-path = "/spi@3210000/spi@1";

                __overlay__ {
                        status = "disabled";
                };
        };

    // Configure pinmux
    /* Documentation for this pinmux:
    *  https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/nvidia%2Ctegra194-pinmux.yaml
    */
    fragment@2 {
        target = <&pinmux>;
        __overlay__ {
            pinctrl-names = "default";
            pinctrl-0 = <&jetson_io_pinmux>;

            jetson_io_pinmux: exp-header-pinmux {
                hdr40-pin19 {
                    nvidia,pins = "spi1_mosi_pz5";
                    nvidia,function = "spi1";
                    nvidia,pin-label = "spi1_dout";
                    nvidia,tristate = <TEGRA_PIN_DISABLE>;
                    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                };
                hdr40-pin21 {
                    nvidia,pins = "spi1_miso_pz4";
                    nvidia,function = "spi1";
                    nvidia,pin-label = "spi1_din";
                    nvidia,tristate = <TEGRA_PIN_DISABLE>;
                    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                };
                hdr40-pin23 {
                    nvidia,pins = "spi1_sck_pz3";
                    nvidia,function = "spi1";
                    nvidia,pin-label = "spi1_sck";
                    nvidia,tristate = <TEGRA_PIN_DISABLE>;
                    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                };
                hdr40-pin24 {
                    nvidia,pins = "spi1_cs0_pz6";
                    nvidia,function = "spi1";
                    nvidia,pin-label = "spi1_cs0";
                    nvidia,tristate = <TEGRA_PIN_DISABLE>;
                    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                };
                hdr40-pin26 {
                    nvidia,pins = "spi1_cs1_pz7";
                    nvidia,function = "spi1";
                    nvidia,pin-label = "spi1_cs1";
                    nvidia,tristate = <TEGRA_PIN_DISABLE>;
                    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                };
                hdr40-pin22 {
                    nvidia,pins = "soc_gpio21_pq1";
                    nvidia,pin-label = "spi0_dr";
                    nvidia,tristate = <TEGRA_PIN_DISABLE>;
                    nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                };
            };
        };
    };


    fragment@3 {
        target = <&spi0>;

        __overlay__ {
            /* needed to avoid dtc warning */
            #address-cells = <1>;
            #size-cells = <0>;


            adis16448: adis16448@0 {
                compatible = "adi,adis16448";
                reg = <0>;
                spi-cpha;
                spi-cpol;
                adi,crc;
                spi-max-frequency = <1000000>;
                /* Number in interrupts corresponds to pin22 (PORT Q PIN 1)
                 * See Nvidia device tree repo
                 * (git://nv-tegra.nvidia.com/device/hardware/nvidia/soc/tegra.git)
                 * for resolving the TEGRA_MAIN_GPIO macro or their excel sheet.
                 */
                interrupts = <129 IRQ_TYPE_EDGE_RISING>;
                interrupt-parent = <&tegra_main_gpio>;
                controller-data {
                    nvidia,enable-hw-based-cs;
                };
            };
        };
    };
};

I use the Pin 22 as the data ready pin and configure it as an interrupt. This file is selected via the jetson-io.py script and it does select all correct SPI pins. Strangely, the pin 22 stays on “NA” in the script…

Can you see something which is not correct with this file?

3

Hi matthias.mueller1,

Are you using the devkit or custom board for AGX Xavier?
What’s the Jetpack version in use? JP5.1.1(r35.3.1)?

I think tegra_main_gpio may not be recognized in overlay dts.
and also like IRQ_TYPE_EDGE_RISING, TEGRA_PIN_ENABLE, TEGRA_PIN_DISABLE.
They should be all hex value in overlay dtb.

Could you share the full serial console log at this moment?

Have you tried to enter recovery boot and remove the overlay dtb to check if your board can be recovered?

4

Thank you very much for your reply.
I use the stock dev kit and my Jetpack version is 5.1.1-b56.

What should I use instead of tegra_main_gpio? And what hex numbers should I use for the IRQ_TYPE_EDGE_RISING, TEGRA_PIN_ENABLE, TEGRA_PIN_DISABLE?

As for the serial console, I will post this soon.

The recovery of the device is not a problem, I just boot with the original configuration (select “0” while booting) and it boots normally. So it is not bricked or so, just this overlay configuration does not work.

5

This is my startup log. I notice that it boots kind of into a debug fs? Whereas a normal boot does a “booting linux un physical cpu…” instead of “debugfs initialized”

[  604.185674] watchdog: watchdog0: watchdog did not stop!
[  604.500779] Trying to unregister non-registered hwtime source
[  604.765200] arm-smmu 12000000.iommu: disabling translation
[  604.766189] arm-smmu 10000000.iommu: disabling translation
[  604.767386] reboot: Restart▒▒
[0000.053] W> RATCHET: MB1 binary ratchet value 4 is larger than ratchet level 2 from HW fuses.
[0000.061] I> MB1 (prd-version: 2.6.0.0-t194-41334769-cab45716)
[0000.067] I> Boot-mode: Coldboot
[0000.069] I> Platform: Silicon
[0000.072] I> Chip revision : A02P
[0000.075] I> Bootrom patch version : 15 (correctly patched)
[0000.080] I> ATE fuse revision : 0x200
[0000.084] I> Ram repair fuse : 0x1
[0000.087] I> Ram Code : 0x2
[0000.090] I> rst_source: 0xb, rst_level: 0x1
[0000.094] I> Boot-device: SDMMC (instance: 3)
[0000.111] I> sdmmc DDR50 mode
[0000.114] I> Boot chain mechanism: A/B
[0000.118] I> Current Boot-Chain Slot: 0
[0000.121] I> BR-BCT Boot-Chain: 0, status: 0. update flag: 0
[0000.128] W> PROD_CONFIG: device prod data is empty in MB1 BCT.
[0000.134] I> Temperature = 34000
[0000.137] W> Skipping boost for clk: BPMP_CPU_NIC
[0000.141] W> Skipping boost for clk: BPMP_APB
[0000.145] W> Skipping boost for clk: AXI_CBB
[0000.149] W> Skipping boost for clk: AON_CPU_NIC
[0000.153] W> Skipping boost for clk: CAN1
[0000.157] W> Skipping boost for clk: CAN2
[0000.162] I> Boot-device: SDMMC (instance: 3)
[0000.171] I> Sdmmc: HS400 mode enabled
[0000.175] I> Non-ECC region[0]: Start:0x80000000, End:0x100000000
[0000.182] W>  Thermal config not found in BCT
[0000.190] W>  MEMIO rail config not found in BCT
[0000.212] I> sdmmc bdev is already initialized
[0000.257] W>  Platform config not found in BCT
[0000.291] I> MB1 done

▒▒▒▒main enter
SPE VERSION #: R01.00.18 Created: Jan 29 2021 @ 14:18:27
HW Function test
Start Scheduler.
in late init
▒▒
  [0000.300] I> Welcome to MB2(TBoot-BPMP) (version: default.t194-mobile-74494172)
[0000.301] I> DMA Heap @ [0x526fa000 - 0x52ffa000]
[0000.301] I> Default Heap @ [0xd486400 - 0xd48a400]
[0000.302] E> DEVICE_PROD: Invalid value data = 70020000, size = 0.
[0000.308] W> device prod register failed
[0000.311] I> gpio framework initialized
[0000.315] I> tegrabl_gpio_driver_register: register 'nvidia,tegra194-gpio' driver
[0000.322] I> tegrabl_gpio_driver_register: register 'nvidia,tegra194-gpio-aon' driver
[0000.330] I> No valid sdcard_params in mb1_bct
[0000.334] I> Boot_device: SDMMC_BOOT instance: 3
[0000.339] I> sdmmc-3 params source = boot args
[0000.348] I> sdmmc-3 params source = boot args
[0000.348] I> sdmmc bdev is already initialized
[0000.381] I> Found 20 partitions in SDMMC_BOOT (instance 3)
[0000.397] I> Found 44 partitions in SDMMC_USER (instance 3)
[0000.398] I> Active Boot chain : 0
[0000.456] I> Relocating BR-BCT
[0000.458]  > DEVICE_PROD: device prod is not initialized.
[0000.484] E> I2C: slave not found in slaves.
[0000.484] E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
[0000.485] E> I2C_DEV: Failed to send register address 0x00000000.
[0000.486] E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xae at 0x00000000 via instance 0.
[0000.487] E> eeprom: Failed to read I2C slave device
[0000.490] I> Failed to read CVB eeprom data @ AE
[0000.495] I> Retrying CVB eeprom read @ AC ...
[0000.569] I> Relocating OP-TEE dtb from: 0x6bfff240 to 0x70050000, size: 1008
[0000.570] I> [0] START: 0x80000000, SIZE: 0x2f000000
[0000.570] I> [1] START: 0xaf010000, SIZE: 0x189f0000
[0000.571] I> [2] START: 0xc7b00000, SIZE: 0xc0000
[0000.571] I> [3] START: 0xca000000, SIZE: 0x800000
[0000.572] I> dram_block larger than 80000000
[0000.574] I> [4] START: 0x100000000, SIZE: 0x780000000
[0000.585] I> Setting NS memory ranges to OP-TEE dtb finished.
[0000.600] I> found decompressor handler: lz4
[0001.095] I> EKB detected (length: 0x410) @ VA:0x526ff400
[0001.097] I> Setting EKB blob info to OPTEE dtb finished.
▒▒NOTICE:  BL31: v2.6(release):07eea4970
NOTICE:  BL31: Built : 07:55:15, Mar 19 2023
I/TC:
▒▒
  ▒▒I/TC: Non-secure external DT found
▒▒bpmp: init
bpmp: tag is 128431eec76692047e1ac1ebc0392266
sku_dt_init: not sku 0x00
clk_early initialized
mail_early initialized
fuse initialized
hwwdt initialized
t194_ec_get_ec_list: found 45 ecs
ec initialized
vmon_setup_monitors: found 3 monitors
vmon initialized
adc initialized
fmon_populate_monitors: found 73 monitors
fmon initialized
mc initialized
reset initialized
nvhs initialized
uphy_early initialized
emc_early initialized
392 clocks registered
clk initialized
io_dpd initialized
thermal initialized
thermal_mrq initialized
i2c initialized
vrmon_dt_init: vrmon node not found
vrmon_chk_boot_state: found 0 rail monitors
vrmon initialized
regulator initialized
▒▒I/TC: OP-TEE version: 3.19 (gcc ▒▒avfs_clk_platform initialized
▒▒version 9.▒▒soctherm initialized
▒▒3.▒▒aotag initialized
▒▒0 ▒▒powergate initialized
▒▒(Buildroot 2020.08)) #2 Sun Mar 19 15:02:42 UTC 2023 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/l▒▒dvs initialized
▒▒at▒▒pm initialized
▒▒e▒▒suspend initialized
▒▒st/a▒▒pg_late initialized
▒▒r▒▒pg_mrq_init initialized
strap initialized
▒▒c▒▒nvl initialized
▒▒hitecture/▒▒emc initialized
emc_mrq initialized
▒▒porting_guidelines.html
I/TC: Primary CPU initializing
▒▒clk_dt initialized
tj_init initialized
uphy_dt initialized
uphy_mrq initialized
uphy initialized
ec_swd_poll_start: 281 reg polling start w period 47 ms
ec_late initialized
hwwdt_late initialized
reset_mrq initialized
ec_mrq initialized
fmon_mrq initialized
clk_mrq initialized
avfs_mrq initialized
mail_mrq initialized
i2c_mrq initialized
tag_mrq initialized
console_mrq initialized
mrq initialized
clk_sync_fmon_post initialized
clk_dt_late initialized
noc_late initialized
pm_post initialized
dbells initialized
dmce initialized
cvc initialized
avfs_clk_mach_post initialized
avfs_clk_platform_post initialized
cvc_late initialized
regulator_post initialized
rm initialized
console_late initialized
clk_dt_post initialized
mc_reg initialized
pg_post initialized
profile initialized
fuse_late initialized
extras_post initialized
bpmp: init complete
entering main console loop
] ▒▒I/TC: Primary CPU switching to normal world boot
▒▒
  [0001.748] I> Welcome to NVDisp-Init
[0001.748] I> NVDisp-Init version: t194-709c0123
[0001.748] I> CPU-BL Params @ 0xca020000
[0001.749] I>  0) Base:0x00000000 Size:0x00000000
[0001.749] I>  1) Base:0xc8100000 Size:0x00100000
[0001.749] I>  2) Base:0xc9800000 Size:0x00200000
[0001.750] I>  3) Base:0xc8600000 Size:0x00200000
[0001.752] I>  4) Base:0xc8000000 Size:0x00100000
[0001.757] I>  5) Base:0xc7f00000 Size:0x00100000
[0001.761] I>  6) Base:0xc9400000 Size:0x00400000
[0001.766] I>  7) Base:0xc9000000 Size:0x00400000
[0001.770] I>  8) Base:0xc7e00000 Size:0x00100000
[0001.775] I>  9) Base:0xc7d00000 Size:0x00100000
[0001.779] I> 10) Base:0xca800000 Size:0x00800000
[0001.783] I> 11) Base:0x40000000 Size:0x00040000
[0001.788] I> 12) Base:0xc7c00000 Size:0x00100000
[0001.792] I> 13) Base:0x40046000 Size:0x00002000
[0001.797] I> 14) Base:0x40048000 Size:0x00002000
[0001.801] I> 15) Base:0xaf000000 Size:0x00004000
[0001.806] I> 16) Base:0x4004a000 Size:0x00002000
[0001.810] I> 17) Base:0xc7a00000 Size:0x00100000
[0001.815] I> 18) Base:0x4004c000 Size:0x00002000
[0001.819] I> 19) Base:0xc9a00000 Size:0x00600000
[0001.824] I> 20) Base:0x4004e000 Size:0x00002000
[0001.828] I> 21) Base:0xc7bc0000 Size:0x0000c000
[0001.833] I> 22) Base:0x00000000 Size:0x00000000
[0001.837] I> 23) Base:0xc7be0000 Size:0x00020000
[0001.841] I> 24) Base:0xcc000000 Size:0x02000000
[0001.846] I> 25) Base:0x40050000 Size:0x00002000
[0001.850] I> 26) Base:0x40040000 Size:0x00006000
[0001.855] I> 27) Base:0xc8c00000 Size:0x00400000
[0001.859] I> 28) Base:0xc8400000 Size:0x00200000
[0001.864] I> 29) Base:0xc8800000 Size:0x00400000
[0001.868] I> 30) Base:0xc7bd0000 Size:0x00010000
[0001.873] I> 31) Base:0x00000000 Size:0x00000000
[0001.877] I> 32) Base:0xf8000000 Size:0x08000000
[0001.882] I> 33) Base:0xce000000 Size:0x2a000000
[0001.886] I> 34) Base:0xcb000000 Size:0x01000000
[0001.891] I> 35) Base:0xae000000 Size:0x01000000
[0001.895] I> 36) Base:0xa0000000 Size:0x0e000000
[0001.899] I> 37) Base:0xca000000 Size:0x00800000
[0001.904] I> 38) Base:0x80000000 Size:0x20000000
[0001.908] I> 39) Base:0xb0000000 Size:0x08000000
[0001.913] I> 40) Base:0x00000000 Size:0x00000000
[0001.917] I> 41) Base:0x00000000 Size:0x00000000
[0001.922] I> 42) Base:0xc8200000 Size:0x00200000
[0001.926] I> 43) Base:0x00000000 Size:0x00000000
[0001.931] I> 44) Base:0x00000000 Size:0x00000000
[0001.935] I> 45) Base:0x00000000 Size:0x00000000
[0001.940] GIC-SPI Target CPU: 0
[0001.943] Interrupts Init done
[0001.945] calling constructors
[0001.948] initializing heap
[0001.951] I> Heap: [0xa0960000 ... 0xadf00000]
[0001.955] initializing threads
[0001.958] initializing timers
[0001.961] creating bootstrap completion thread
[0001.965] top of bootstrap2()
[0001.968] CPU: MIDR: 0x4E0F0040, MPIDR: 0x80000000
[0001.973] initializing platform
[0001.976] E> DEVICE_PROD: Invalid value data = 0, size = 0.
[0001.981] W> device prod register failed
[0001.985] I> Bl_dtb @0xadf00000
[0001.988] I> gpio framework initialized
[0002.000] I> tegrabl_gpio_driver_register: register 'nvidia,tegra194-gpio' driver
[0002.006] I> tegrabl_gpio_driver_register: register 'nvidia,tegra194-gpio-aon' driver
[0002.011] I> fixed regulator driver initialized
[0002.032] I> register 'maxim' power off handle
[0002.034] I> virtual i2c enabled
[0002.034] I> registered 'maxim,max20024' pmic
[0002.035] I> tegrabl_gpio_driver_register: register 'max20024-gpio' driver
[0002.035] I> Boot-device: eMMC
[0002.036] I> Boot_device: SDMMC_BOOT instance: 3
[0002.039] I> sdmmc-3 params source = boot args
[0002.042] W> No board IDs available
[0002.044] E> Failed to get board id info!
[0002.048] I> sdmmc bdev is already initialized
[0002.052] I> sdmmc-3 params source = boot args
[0002.059] I> Found 20 partitions in SDMMC_BOOT (instance 3)
[0002.064] I> Found 44 partitions in SDMMC_USER (instance 3)
[0002.086] I> enabling 'vdd-hdmi-5v0' regulator
[0002.094] I> regulator 'vdd-hdmi-5v0' already enabled
[0002.095] I> hdmi cable connected
[0002.101] W> set volts not configured for 'vdd-1v0'
[0002.108] W> set volts not configured for 'vdd-1v8-hs'
[0002.108] I> retrieved tmds range from prod_list_hdmi_soc
[0002.110] E> cannot find any other nvdisp nodes
[0002.126] I> edid read success
[0002.139] I> edid read success
[0002.139] I> width = 640, height = 480, frequency = 25174825
[0002.139] I> width = 640, height = 480, frequency = 25174825
[0002.140] I> width = 1024, height = 768, frequency = 65000000
[0002.140] I> width = 1024, height = 768, frequency = 65000000
[0002.141] I> width = 1920, height = 1080, frequency = 148500000
[0002.145] I> width = 1920, height = 1080, frequency = 148500000
[0002.150] I> width = 1920, height = 1080, frequency = 148351648
[0002.156] I> width = 1280, height = 720, frequency = 74175824
[0002.162] I> width = 720, height = 480, frequency = 26973026
[0002.167] I> width = 720, height = 480, frequency = 26973026
[0002.173] I> width = 640, height = 480, frequency = 25174825
[0002.178] I> width = 720, height = 576, frequency = 26973026
[0002.184] I> width = 720, height = 576, frequency = 26973026
[0002.189] I> width = 1280, height = 720, frequency = 74175824
[0002.195] I> width = 1920, height = 1080, frequency = 148351648
[0002.201] I> Best mode Width = 1920, Height = 1080, freq = 148351648
[0002.212] I> hdmi_enable, starting HDMI initialisation
[0002.217] I> hdmi_enable, HDMI initialisation complete
[0002.226] initializing target
[0002.227] calling apps_init()
[0002.227] starting app kernel_boot_app
[0002.228] I> Kernel type = Normal

Jetson UEFI firmware (version 3.1-32827747 built on 2023-03-19T14:56:32+00:00)

**  WARNING: Test Key is used.  **

L4TLauncher: Attempting Direct Boot
L4T boot options
0: primary kernel
1: Custom Header Config: <HDR40 ADIS16448 Jetson overlay>
Press 0-1 to boot selection within 3.0 seconds.
Press any other key to boot default (Option: 1)
EFI stub: Booting Linux Kernel...
EFI stub: Using DTB from configuration table
EFI stub: Loaded initrd from LINUX_EFI_INITRD_MEDIA_GUID device path
EFI stub: Exiting boot services and installing virtual address map...
▒▒I/TC: Secondary CPU 1 initializing
I/TC: Secondary CPU 1 switching to normal world boot
I/TC: Secondary CPU 2 initializing
I/TC: Secondary CPU 2 switching to normal world boot
I/TC: Secondary CPU 3 initializing
I/TC: Secondary CPU 3 switching to normal world boot
I/TC: Secondary CPU 4 initializing
I/TC: Secondary CPU 4 switching to normal world boot
I/TC: Secondary CPU 5 initializing
I/TC: Secondary CPU 5 switching to normal world boot
I/TC: Secondary CPU 6 initializing
I/TC: Secondary CPU 6 switching to normal world boot
I/TC: Secondary CPU 7 initializing
I/TC: Secondary CPU 7 switching to normal world boot
▒▒debugfs initialized
▒▒[    27.807664] Camera-FW on t194-rce-safe started
TCU early console enabled.
[    27.875599] Camera-FW on t194-rce-safe ready SHA1=26f9e5f7 (crt 0.774 ms, total boot 68.739 ms)
▒▒WARNING: clock_disable: clk_power_ungate on gated domain 27 for gpcclk
6

It should be the phandle value for main gpio controller(gpio@xxxxx).

You can refer to other existing node for them, they are just 0x0 or 0x1.

Is it the full serial console log and it just stuck here?

Okay, please recover the board and update the overlay file with correct value.
Or you can try to update dts from source and rebuild kernel image/dtb to apply the change.

7

Yes, this is the full serial log, afterwards it appears dead.

I will recover it and play around with the overlay files and the numbers. When I have found a working solution, I may post the overlay file for others.

8

Okay, thank you for sharing them for others.