Jetson AGX Xavier NVLINK

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

I am designing a custom carrier PCBA that will incorporate multiple AGX Xavier modules. I would like to utilize NVLINK to directly connect two of the AGX modules. However, I have some questions regarding NVLINK.

  1. Do you have any reference documentation or app notes regarding the NVLINK interface?

  2. Are all eight lanes from PCIE controller C5 required for NVLINK to function properly, or can only 4 lanes from PCIE controller C5 be routed between two AGX modules for NVLINK data transmission (at a reduced data rate)?

3

Hi, please refer to this doc : https://developer.nvidia.com/embedded/dlc/jetson-agx-xavier-series-pcie-endpoint-design-guidelines-application-note

4

Hi Trumany,

I was already aware of the app note above. Unfortunately, the document does not address my second question.

  1. Are all eight lanes from PCIE controller C5 required for NVLINK to function properly, or can only 4 lanes from PCIE controller C5 be routed between two AGX modules for NVLINK data transmission (at a reduced data rate)
5

Please follow guide to use all eight lanes.