Jetson Nano does not honor 32bit pci_set_dma_mask

[dean.ramsier]

Hi all,

I have an M.2 PCIe device with a 32bit DMA bus address limitation. The driver for the device makes the following call:
pci_set_dma_mask(pdev, DMA_BIT_MASK(32)), which returns successfully. This should mean that the host indicated that it can support the requirement for a 32bit DMA address, and will provide a 32bit address when requested.

However, when the driver later makes a call to pci_map_single(), a DMA bus address above 4GB is returned.

Is this a known issue or am I completely misunderstanding something? Is there a way to force the platform to use a DMA address range below 4GB?

I’m using the latest L4T 32.4 release.

Thanks!

[dean.ramsier]

Looks like this fixes it:

PCIE WiFi module driver crashes on Nano but not on TX1

I have a Laird ST60-2230C-PU Wi.Fi module that I’ve verified is fully working on a Jetson TX1 (able to host access point and serve data over WiFi at 200Mbps). When I connect this module to my custom Nano SOM carrier board I am able to enumerate the device over PCIE and install the drivers, the same way as I do for the TX1, but when I actually try to connect to or host an access point there is a kernel oops/panic: [ 124.767152] IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready [ 124.787960]…

Out of curiousity, is there any downside to enabling the SMMU?

[vidyas]

There is no real downside as such except that with some of the non-optimized Ethernet card drivers, we observed a little less performance. If the perf you are getting with SMMU enabled is fine for you, please go ahead and keep the SMMU enabled.

[dean.ramsier]

Thanks!