Jetson Nano custom motherboard Wifi doesn't work

Hello,

we have designed a custom motherboard. The board has two PCIE connectors, one was Ethernet, the other was wifi, the wifi modules was rtl88x2ce , now doesn’t work .
Does anyone have any success with rtl88x2ce minipcie wifi module on the jetson nano, error message below.

[   25.322209] mc-err:   status = 0x2000000e; addr = 0x7933c000                                                                                                                               
[   25.327891] mc-err:   secure: no, access-type: read, SMMU fault: none                                                                                                                      
[   35.597387] mc-err: (0) csr_afir: EMEM address decode error                                                                                                                                
[   35.602979] mc-err:   status = 0x2000000e; addr = 0x7933c000                                                                                                                               
[   35.608689] mc-err:   secure: no, access-type: read, SMMU fault: none                                                                                                                      
[   45.716390] mc-err: Too many MC errors; throttling prints                                                                                                                                  
[   66.195213] mc-err: (0) csr_afir: EMEM address decode error                                                                                                                                
[   66.200809] mc-err:   status = 0x2000000e; addr = 0x7933c000                                                                                                                               
[   66.206486] mc-err:   secure: no, access-type: read, SMMU fault: none                                                                                                                      
[   76.436142] mc-err: (0) csr_afir: EMEM address decode error                                                                                                                                
[   76.441902] mc-err:   status = 0x2000000e; addr = 0x7933c000                                                                                                                               
[   76.447685] mc-err:   secure: no, access-type: read, SMMU fault: none                                                                                                                      
[   97.205141] mc-err: (0) csr_afir: EMEM address decode error                                                                                                                                
[   97.210821] mc-err:   status = 0x2000000e; addr = 0x7933c000                                                                                                                               
[   97.216493] mc-err:   secure: no, access-type: read, SMMU fault: none   
 


 

 
# lspci -vvv -x -s 01:00.0
01:00.0 Network controller: Realtek Semiconductor Co., Ltd. Device c82f
        Subsystem: Lenovo Device c02f
        Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 404
        Region 0: I/O ports at 1000 [disabled] 
        Region 2: Memory at 13000000 (64-bit, non-prefetchable) [disabled] 
        Capabilities: [40] Power Management version 3
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
                Address: 0000000000000000  Data: 0000
        Capabilities: [70] Express (v2) Endpoint, MSI 00
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 <64us
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0.000W
                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr+ UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <4us, L1 <64us
                        ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
                DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR+, OBFF Via message/WAKE#
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
                LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
                         Compliance De-emphasis: -6dB
                LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
                         EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
        Capabilities: [100 v2] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
                AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn-
        Capabilities: [148 v1] Device Serial Number 00-e0-4c-ff-fe-c8-22-01
        Capabilities: [158 v1] Latency Tolerance Reporting
                Max snoop latency: 0ns
                Max no snoop latency: 0ns
        Capabilities: [160 v1] L1 PM Substates
                L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
                          PortCommonModeRestoreTime=30us PortTPowerOnTime=60us
                L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
                           T_CommonMode=0us LTR1.2_Threshold=0ns
                L1SubCtl2: T_PwrOn=10us
        Kernel driver in use: rtl88x2ce
00: ec 10 2f c8 00 00 10 00 00 00 80 02 00 00 00 00
10: 01 10 00 00 00 00 00 00 04 00 00 13 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 aa 17 2f c0
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00

I didn’t succeed refer to this topichttps://devtalk.nvidia.com/default/topic/1051777/jetson-nano/airetos-aex-qca9880-nx-wifi-module-on-jetson-nano/1, can you please help me,thanks.

Please also share the full dmesg.

Hi,

It looks like WiFi chip supports 32-bit DMA only. Please enable SMMU to allocate 32-bit DMA buffers.
Please remove following lines to enable SMMU in,

file: hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-pcie.dtsi
Lines to remove:
/delete-property/ iommus;
/delete-property/ iommu-map;
/delete-property/ iommu-map-mask;

Compile DTB and flash it.

  • Manikanta

Hi,

I do appreciate the direction on what file to change to overcome this problem (I experience the same with some other Wifi card from QUALCOMM i.e. QCA6174), but can someone advise a detailed procedure that can be used to modify this DTB and flash it?

I have been checking around and could come across some procedure created by ridgerun, however there it is used as scrip that i cannot find anywhere “create-jetson-nano-sd-card-image.sh” that seems to be necessary to create encrypted dts image…

NVIDIA guys, i realize that all this is made for rather computer literate people, but, there is so much inconsistency with what you prepare/describe as if someone made all this so confusing on purpose.
Why you could not just enable SMMU by default?
Why not allow usage wider range of pcie hardware?
Why not make it a configurable?

@Manikanta Thanks for advice. How to modify jetson nano carrier Device Tree, compile and flash it to Jetson SoM? Could we do it in Jetson SDK?

Hi fdtsaid,

Please download the kernel source code from the download center.
https://developer.nvidia.com/embedded/downloads

Check the l4t development guide for kernel compilation.
https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fkernel_custom.html%23

The flash process is in the quick start guide in download center too. You need to replace the modified dtb file under Linux_for_Tegra/kernel/dtb/.

If you don’t know how device tree works, you could refer to some public resources.
https://elinux.org/Device_Tree_Reference