Jetson nano spi can not work(emmc module)

Robotics & Edge Computing Jetson & Embedded Systems Jetson Nano
1

I am using JetPack4.6 to do Nano spi1(succeed) and spi2（failed） loop test.it is strange that i don’t modiy the dtsi,but Read registers SPI1 and SPI2, the former is the value I want and the latter is the default value。

jetson_nano
jetson_nano1101×751 170 KB

 spi1_sck_pc2 {
                                nvidia,pins = "spi1_sck_pc2";
                                nvidia,function = "rsvd1"; //i know this should be "spi1"
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi1_cs0_pc3 {
                                nvidia,pins = "spi1_cs0_pc3";
                                nvidia,function = "rsvd1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi1_cs1_pc4 {
                                nvidia,pins = "spi1_cs1_pc4";
                                nvidia,function = "rsvd1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi4_mosi_pc7 {
                                nvidia,pins = "spi4_mosi_pc7";
                                nvidia,function = "rsvd1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi4_miso_pd0 {
                                nvidia,pins = "spi4_miso_pd0";
                                nvidia,function = "rsvd1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

//spi2
spi2_mosi_pb4 {
                                nvidia,pins = "spi2_mosi_pb4";
                                nvidia,function = "rsvd2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi2_miso_pb5 {
                                nvidia,pins = "spi2_miso_pb5";
                                nvidia,function = "rsvd2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi2_sck_pb6 {
                                nvidia,pins = "spi2_sck_pb6";
                                nvidia,function = "rsvd2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi2_cs0_pb7 {
                                nvidia,pins = "spi2_cs0_pb7";
                                nvidia,function = "rsvd2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

                        spi2_cs1_pdd0 {
                                nvidia,pins = "spi2_cs1_pdd0";
                                nvidia,function = "rsvd1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };

#include <dt-bindings/gpio/tegra-gpio.h>

/ {
        gpio: gpio@6000d000 {
                gpio-init-names = "default";
                gpio-init-0 = <&gpio_default>;

                gpio_default: default {
                        gpio-input = <
                                TEGRA_GPIO(A, 5)
                                TEGRA_GPIO(X, 4)
                                TEGRA_GPIO(X, 5)
                                TEGRA_GPIO(X, 6)
                                TEGRA_GPIO(Y, 1)
                                TEGRA_GPIO(V, 1)
                                TEGRA_GPIO(Z, 2)
                                TEGRA_GPIO(H, 2)
                                TEGRA_GPIO(H, 5)
                                TEGRA_GPIO(H, 6)
                                TEGRA_GPIO(I, 1)
                                TEGRA_GPIO(CC, 4)
                                >;
                        gpio-output-low = <
                                TEGRA_GPIO(S, 7)
                                TEGRA_GPIO(T, 0)
                                TEGRA_GPIO(Z, 3)
                                TEGRA_GPIO(H, 0)
                                TEGRA_GPIO(H, 3)
                                TEGRA_GPIO(H, 4)
                                TEGRA_GPIO(H, 7)
                                TEGRA_GPIO(I, 0)
                                TEGRA_GPIO(I, 2)
                                >;
                        gpio-output-high = <
                                TEGRA_GPIO(A, 6)
                                TEGRA_GPIO(X, 3)
                                TEGRA_GPIO(CC, 7)
                                >;
                };
        };
};
3

why the spi1 is 0x0000e044 and 0x0000e048(although this is the numerical value I want) ,i don’t modiy the dtsi。and I think it should be modified in the following way:

spi1_mosi_pc0 {
                                nvidia,pins = "spi1_mosi_pc0";
                                nvidia,function = "spi1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi1_miso_pc1 {
                                nvidia,pins = "spi1_miso_pc1";
                                nvidia,function = "spi1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi1_sck_pc2 {
                                nvidia,pins = "spi1_sck_pc2";
                                nvidia,function = "spi1";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi1_cs0_pc3 {
                                nvidia,pins = "spi1_cs0_pc3";
                                nvidia,function = "spi1";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi1_cs1_pc4 {
                                nvidia,pins = "spi1_cs1_pc4";
                                nvidia,function = "spi1";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

spi2_mosi_pb4 {
                                nvidia,pins = "spi2_mosi_pb4";
                                nvidia,function = "spi2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi2_miso_pb5 {
                                nvidia,pins = "spi2_miso_pb5";
                                nvidia,function = "spi2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi2_sck_pb6 {
                                nvidia,pins = "spi2_sck_pb6";
                                nvidia,function = "spi2";
                                nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi2_cs0_pb7 {
                                nvidia,pins = "spi2_cs0_pb7";
                                nvidia,function = "spi2";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };

                        spi2_cs1_pdd0 {
                                nvidia,pins = "spi2_cs1_pdd0";
                                nvidia,function = "spi2";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };
5

Hi 1415031480,

Are you using the devkit or custom board for Jetson Nano?

The current pinmux for spi2 is not expected. It should be the similar as spi1. (0xe044 and 0xe048)

We suggest using pinmux spreasheet to configure them instead of modifying the device tree manually in case you missed something.