Jetson Orin Nano MIPI-CSI Pixel Clock Requirements

Dear Community,

I found the maximum pixel clock rate for the MIPI-CSI interface in the datasheet for the Jetson Orin Nano. Is there also a requirement for a minimal pixel clock rate?

Please, can someone give me a short list or a link to where I can find the minimal and maximal requirements for the MIPI-CSI camera interface for the Jetson Orin Nano and the development kit, respectively?

Thanks in advance.

werneazc.

Hi @werneazc

Regarding the pixel clock information, you could check the following links:

So, based on the information on those links. The pixel clock is related to the sensor itself and the output data rate.

For example, lets assume that you have the following scenario:

  • 10 bits per pixel.
  • 2 lanes.
  • 1440000000 Hz datarate

Using the first link as the reference, the pixel clock could be computed as:

pixe_clock = (1440000000 * 2) / 10 = 288000000

Hope this helps!

Eduardo Salazar
Embedded SW Engineer at RidgeRun

Contact us: support@ridgerun.com
Developers wiki: https://developer.ridgerun.com/
Website: www.ridgerun.com

1 Like

Dear @EduardoSalazar96

thanks for your reply. This is helpful of course. My special interest is in the minimal pixel clock rate, especially. Is there any limitation?

Regards,

werneazc.

Hello @werneazc

I have not seen any limitation related to the pixel clock rate. I checked the Orin series Design Guide and Technical Reference Manual, and the limitations mentioned are regarding the Maximum pixel clock.

Regards!

Hello @EduardoSalazar96

this is also the result of my research on the documentation. I also did not find any limitation on the minimal frequency. The camera we run has only a 37.5MHz pixel clock rate, and I was wondering if this may be too slow.

Regards,

werneazc

Hi @werneazc

Well, as I explained in my previous comments, the pixel clock depends on Hz datarate, which can be translated into the Driver Frequency or Input Frequency. You can check other sensors’ datasheets in order to compare which frequency they are using. For example:

Which is

Drive Frequency(s) 37.125 / 54 / 74.25 MHz MHz

From this post Problems with nvarguscamerasrc using the last imx565 mode I understand the user could capture using that sensor, but the frequency is not mentioned. I do not think that this would be an issue for your device, the only aspect that I think could affect it is the FPS that the sensor will capture, the lower the frequency, the lower the FPS you will get.

You can continue checking other posts to read what other sensors the developers used and check which are the input frequencies the sensor has.

Regards!

Dear @EduardoSalazar96 ,

sorry, I was sick last week and could not reply recently.
Thanks for the explanation. I think I get this now.

I have one other question regarding the timings. We cannot control the start/stop of streaming at the camera. It will start streaming as soon as power is available. Is this a problem, and does the NVIDIA camera framework need to control the start and stop of the camera stream?

Best regards

werneazc.

Hi @werneazc

Well, normally a MIP-CSI sensor has a driver either made by the user or is already included in the NVIDIA sources. This driver should control the start and stop streaming when you try capturing either using v4l2-ctl or GStreamer.

Did you create the driver by yourself? Perhaps you can take a look at this driver patch NVIDIA-Jetson-IMX708-RPIV3/patches_orin_nano/patches/6.0_orin_nano_imx708_v0.1.0.patch at main · RidgeRun/NVIDIA-Jetson-IMX708-RPIV3 · GitHub made by RidgeRun for the Orin Nano board. If you have any questions regarding the driver please contact us at support@ridgerun.com.

Regards!

Dear @EduardoSalazar96,

Thanks for your support. In our case, we had three points of trouble:

  1. The tegra_sinterface property for mode needs to fit port-index in endpoint properties for camera, tegra-capture-vi, and nvcsi, e.g. CSI0 ↔ tegra_sinterface = “serial_a” ↔ port-index = <0>, CSI1 ↔ tegra_sinterface = “serial_b” ↔ port-index = <1>, …

  2. Set lane_polarity = “6”: We use Jetson Orin Nano Dev-Kit, and in our case, it is required.

  3. Set appropriate value for pix_clk_hz: Having a look into the Kernel sources shows that pix_clk_hz is used to calculate the lane data rates and the MIPI interface clock:

mipi-clk = data_rate / 2  # in case using a DPHY.
data_rate = (pix_clk_hz * csi_pixel_bit_depth) / num_lanes

pix_clk_hz = data_rate * num_lanes / csi_pixel_bit_depth = 2 * num_lanes * mipi-clk /csi_pixel_bit_depth 

If one uses SerDes then data_rate is defined by serdes_pix_clk_hz. Also using CPHY instead of DPHY changes the calculation or the MIPI-Clock a bit.

Hopefully, that helps others if the struggle in getting a valid camera stream.

Cheers,

werneazc

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