Jetson Xavier AGX SoM Custom board design

Hai,
We are developing a Jetson Xavier AGX Carrier Board and we have few doubts related to the hardware and also to verify before production. Do Nvidia has and specific channel/ Mail for sending design files for verification or we need to post in this thread?

Hi revanth.a,

Please post your question here, we will looking into it to give the suggestion.
For custom board design, you can refer to https://developer.nvidia.com/embedded/dlc/jetson-agx-xavier-series-oem-product-design-guide

Hi, @kayccc
Power Section:
We have designed the carrier board to generate/sequence the voltage in the following order kindly go through it and let us know if we have missed something
ON Sequence:

  1. Main / Adapter Power ON
  2. Micro controller Power ON
  3. Microcontroller waits for ON Button (switch) to turn ON (If turned ON follow steps 4 to 9)
  4. Enable 12V (HV_SRC) and 5V (MV_SRC) to the Xavier AGX SoM
  5. Assert VIN_BAD pin (L55) High if voltages are proper (No undervoltage)
  6. Debounce (high to low) Button_Power_On pin (L61) for 20ms
  7. Assert Module Power On pin (L54) High
  8. Wait for Carrier_Power_On pin (L62) to go high then enable all carrier board voltage
  9. Wait for system reset pin (L60) to high

OFF Sequence:
(Option A) – Normal OFF
10. Microcontroller waits for ON Button (switch) to turn OFF (If turned OFF follow steps 11 to 17)
11. Send Shutdown signal to SoM (via UART) (optional)
12. Debounce (high to low) Button_Power_On pin (L61) for 20ms
13. Wait for system reset pin (L60) to Low
14. Assert VIN_BAD pin (L55) Low
15. Wait for Carrier_Power_On pin (L62) to go Low then disable all carrier board voltage
16. Disable 12V (HV_SRC) and 5V (MV_SRC) to the Xavier AGX SoM
17. Power Discharge of 12V (HV_SRC) and 5V (MV_SRC)

(Option B) – Sudden Unplug/Under voltage/Uncontrolled OFF
10. If Voltage drops below 9V on 12V (HV_SRC) VIN_BAD pin (L55) is asserted Low
11. system reset pin (L60) goes low
12. Carrier_Power_On pin (L62) goes low
13. Assert Module Power On pin (L54) Low
14. Power Discharge of 12V (HV_SRC) and 5V (MV_SRC)

Are these settings/Sequence is Okay? Are we missing anything?

JTAG Section/UART Debug

  1. JTAG lines of SoM are connected to JTAG Header 10 pin as per P2822 reference schematic
  2. We have simple UART to USB Bridge (UART3 of SoM to micro-USB connector) for Debug circuit instead of FT4232HQ (which includes JTAG and UART2). Is that okay? Do we need UART2 for any debug purpose?
  3. Do we need to use multiple USB Mux switch as used in the P2822 schematics? To initially flash the OS/save files to eMMC using Jetpack software do we need UART3 USB lines or USB0 lines?
  4. What is the use of JTAG here? any documentation available to show the usage of JTAG?

USB Section

  1. To initially flash the OS/uboot/save files to eMMC in recovery mode using Jetpack software we are using a USB 2.0 Port which is connected to USB0. Here Vbus on the board is left unconnected because it working as a device mode when connected to HOST PC for flashing (Is that correct?)
  2. By doing this we have planned to remove all the USB MUX Switches given in P2822 reference schematic
  3. Are there any other methods other than recovery mode to flash the OS/uBoot or copy files for the first-time usage?
  4. We are using one Type c connector for USB 3.0 and DP output and NO power delivery, so we have used TUSB1046-DCIRNQR whose output connected to type-c connector and input to SoM as per P2822 reference schematic and removed CYPD4226-40LQXIT Power delivery circuit IC (Do we need PD controller IC?)

Are these settings/Sequence is Okay? Are we missing anything?
-The figures in chapter “Power Sequence” have already listed all involved signals and their timing, please just follow that well.

JTAG Section/UART Debug

  1. JTAG lines of SoM are connected to JTAG Header 10 pin as per P2822 reference schematic
    -Jtag port is unnecessary for general customer.
  2. We have simple UART to USB Bridge (UART3 of SoM to micro-USB connector) for Debug circuit instead of FT4232HQ (which includes JTAG and UART2). Is that okay? Do we need UART2 for any debug purpose?
    -Just UART3 for debug is OK
  3. Do we need to use multiple USB Mux switch as used in the P2822 schematics? To initially flash the OS/save files to eMMC using Jetpack software do we need UART3 USB lines or USB0 lines?
    -Flash is thru USB0, UART3 is for debug.
  4. What is the use of JTAG here? any documentation available to show the usage of JTAG?
    -Jtag port is unnecessary for general customer.

USB Section

  1. To initially flash the OS/uboot/save files to eMMC in recovery mode using Jetpack software we are using a USB 2.0 Port which is connected to USB0. Here Vbus on the board is left unconnected because it working as a device mode when connected to HOST PC for flashing (Is that correct?)
    -VBUS is connected to GPIO10, please refer to Figure 21 USB 3.1 USB Micro AB Connection Example Supporting Device & Host Modes & USB 2.0 Recovery Mode.
  2. By doing this we have planned to remove all the USB MUX Switches given in P2822 reference schematic
    -Please refer to OEM DG well.
  3. Are there any other methods other than recovery mode to flash the OS/uBoot or copy files for the first-time usage?
    -No other way.
  4. We are using one Type c connector for USB 3.0 and DP output and NO power delivery, so we have used TUSB1046-DCIRNQR whose output connected to type-c connector and input to SoM as per P2822 reference schematic and removed CYPD4226-40LQXIT Power delivery circuit IC (Do we need PD controller IC?)
    -It depends on if you need PD function.
1 Like

Hi, @Trumany
Thanks for the update.