Jetson Xavier/TX2/Nano PCIe power down sequence not meet standard PCIe spec

Hi~
We measure Jetson Xavier/TX2/Nano PCIe power-down sequence for PCIE0, We found it violate the standard PCIe power-down sequence spec. Does Nvidia know this problem??

PCIe spec



Thanks
Ken

Hi~Nvidia,
Sorry, Could you help me to check this problem?

Thanks
Ken

Hi, which doc is the sequence from? Did you meet any issue and why do you measure the power down sequence of devkit? How do you run the power down process on PCIe port?

Hi~Trumany,
Q1.which doc is the sequence from?
We refer to the below spec to measure the PCIe device power sequence.

PCI Express Card Electromechanical Specification Revision 3.0.pdf (2.3 MB)

Q2.Did you meet any issue and why do you measure the power down sequence of devkit?
We don’t encounter any issue related to this power-down sequence on our custom board, but we don’t know this problem whether can cause any PCIe issue in the future. So, we need to know this power-down sequence can be fined tine by SW or not. Please tell us this problem cannot be fined tine if this is a known issue.

Q3.How do you run the power down process on PCIe port?
Normally shunt down in Ubuntu OS when I measure power-down sequence.
(Click shut down icon by USB mouse)

Thanks
Ken

We are checking internally, will update once available.

Hi~Trumany,
Sorry to bother you. Do you have any progress on this problem?

Thanks
Ken

No update yet. Basically we did not receive feedback of this before, and no issue related to this is reported, you should be able to leave it along currently. Anyway our team is trying to do some tests on this, will update once available.

Hi~Trumany,
Sorry to bother you. Do you have any progress on this problem?

Thanks
Ken

Yes we are violating the spec. We will fix it in future release. Thanks.

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