Using Busybox devmem command, I managed to read back and write the registers. I tried the following :
read back of register T_PCIE2_PADS_REFCLK_BIAS (address 0x100030D0) with 0x28, this is the recommended setting from the Tuning Guide read back of register T_PCIE2_PADS_REFCLK_CFG0_0(address 0x100030C8) with 0x80B880B8 read back of register T_PCIE2_PADS_REFCLK_CFG0_1(address 0x100030CC) with 0x000480B8
I have a oscilloscope to measure 1 of the 3 PCIe reference clock on my Printed Circuit Board, its measured signal is a 600mV positive offset with a 150mV switching clock riding on the positive offset.
when register T_PCIE2_PADS_REFCLK_CFG0_1 (address 0x100030CC) was written with value 0x0004F0B8, the current driver is supposed to increase current drive from 10.4mA to 16mA. This current is supposed to flow through the 50 ohm termination resistors to create voltage increase from 520mV to 800mV. But in observation, the scope only showed an increase in voltage from around 150mV to 200mV. Can Nvidia explain why there is only marginal increase in voltage ? I saw in TX2 Technical Reference Manual, there is a header file ardev_t_pcie2_pads.h that probably defines all the PCIe PADS registers. May I know how to get it ? Please also advise how to set the change so that a newly compiled kernel can have changes to these registers. It is because if the PCIe reference clock is not stable to the FPGA, there will be a lot of PCIe error messages during booting and it will deny TX2 from successfully boot up. It will not be possible to use busybox devmem command if TX2 cannot even boot up.