Limit PCIe controller to GenX

Dear Developers,

Is there a way to limit the Xavier PCIe controller to PCIe GenX (where X can be 1,2,3,4 depending on use case) via the device tree for example to set it to GEN2 for devices which work unstable on GEN3 (altough in theory they support it)?

Are you referring to just the speed supported by different generations of PCIe spec? or you want the controller to operate adhering to a specific spec version?
If your question is about the former case, you can use set the required gen version in the device-tree property “nvidia,max-speed” of the respective controller.
If your question is about the latter case, I’ll find out if that kind of support is available and get back to you.

Thank you very much, I will try the nvidia,max-speed property first, if it does not help, I will write again.

Unfortunately it seems we have the latter case: different generation by PCIe spec.

I am curious…does the “nvidia,max-speed = <0x4>” correspond to making revision 4 available? Is it as simple as setting to “<0x2>” for example for revision 2 as maximum possible revision?

I am curious…does the “nvidia,max-speed = <0x4>” correspond to making revision 4 available?
It makes PCIe rootport able to support Gen-4 speed which is 16 GT/s

Unfortunately it seems we have the latter case: different generation by PCIe spec
Unfortunately there is no way controller can be made to work in a specific gen. Although, this the reply I got from hardware designers.
Please note that new features are added with enable bits defined in register bits set as reserved/read-only in previous versions of the spec (e.q. IDO and TLP prefixes) or added as a new extended capability with a new capability ID (e.q. LTR and L1SS). So SW expected the controller to operate as older version of the spec should treat existing bits as reserved/RO and new capabilities as don’t care
BTW, do you have any specific reason (or) aspect of rootport controller that you would like to highlight here? So, that we can see what best can be done to achieve that?

What solved my problem: setting the nvidia,max-speed property to the desired, and also removing nvidia,enable-power-down from the node.

Apparently just before the time when the PCIe endpoint configured itself correctly, the power rails of the PCIe host were turned off.

Power rails would be turned off only if there are no endpoints found. Did you mean, your PCIe endpoint was a bit slow and hence when host tried to get the link up it didn’t happen, but the link is up after you removed ‘nvidia,enable-power-down’ (since the root port is at least going to be in that state)? and you later got the endpoint enumerated by re-scanning the bus?

More or less; because no manual scanning is necessary. With the enable-power-down the power turns on-off two times during boot (PCIe devices are searched two times?), without the enable-power-down the device is available on the second probing.

Yes.
Ok, now I got it