We are designing a board including a Jetson Xavier module.
We use 3 PCIe x1 devices to communicate with the Xavier.
We are questioning about PCIe controllers configuration :
1/ if we choose the 3 x1 controllers (C1, C2, C3) as root ports,
–> How to modify the clock frequency to 125 MHz ?
–> How to change de Xavier default configuration in order to use C2 controller ?
2/ if we choose to use the first lane of the C4 controller, do the physical pins correspond to “UPHY_8” (there is an ambiguity in the OEM design guide) and the clock to “PEX_CLK4” ?
3/ Same question if we use C0 and C5 as x1 port, what are the I/O pin of TX/RX and CLK ?
4/ in the documentation, it is mentioned to power up the Nvidia Jetson if used as end-point port : is it crucial or may it be powered up after the rott port device ?