I am working on interfacing Jetson Nano 2GB Dev kit with ADAU7118, a PDM to I2S/TDM Converter which is connected to a PDM microphone.
I have enabled I2S4, BLCK, FSYNC using the jetson-io.py All these ports seem active on the jetson-io.py interface.
To make this system work and listen to audio, I run "arecord -D hw:1,0 -r 48000 -f 32_LE -c 8 -d 20 output.wav. As a result I expect to see 12.28 Mhz signal coming from the BCLK. However, I always see 40-42 Mhz of clock coming from here, even while I am not listening.
I have also looked on modifiying the device tree, and tried to hardcode the clock rate of 12.28 Mhz under i2s@702d1300, but that did not help as well. I have gone over the l4t-3275 guidelines, but could not make it work. I am new to working with audio, and appreciate if you could help.
For your case the command would be:
amixer -c 1 cset name=“ADMAIF1 Mux” I2S4
Then start arecord on hw:1,0. Please try out 2 channel, 16 bit audio first, before attempting higher configuration.
Yes I have followed it, I have updated the configuration by entering “amixer -c 1 cset name=“ADMAIF1 Mux” I2S4”. Then checked the clk_summary, I have attached it here. I am not sure but here the clk index starts from 0 so I guess I should be looking at the i2s3, and it shows 1.536 Mhz which is the expected.
But when I try to observe it from the oscilloscope it is stuck on 39 MHz. I have checked that the oscilloscope and its probe are working correctly with other hardware. What would you recommend?
If the I2S clock is OK and the pinmux is OK, then the clock should flow from the pin. Can you please check what clock you get at LRCK pin? Also, are the observed frequencies changing when you change the arecord sample rate (say to 16 kHz)? Also, have you tried probing the pins directly at the 40-pin header without connecting the codec?
Sorry couldnt return an answer until completing all tests.
The pinmux and the i2s3_clk (clk for i2s4) looks as whtat we wanted to be. I have tested both with the codec and without the codec. Both the fsync(lrclk) pin and bclk always return a clock between 40-45 Mhz. Should I try out any additional modifications in the device tree?
Had to reflash the board, I did it everything once again. Now I can see the 48Khz of lrclk but my bclk is still stuck at around 40 Mhz. Even though the clk summary shows the mulitplication of the arecord values (sampling rate, bitsize and channel size). (48K, 32bit, 2 channels and the clk_summary shows around 3 Mhz)
Since the LRCK is OK, I don’t have much to suspect. I hope the pinmux for the pins is set correctly; also that you are probing the correct pin for BCLK. Can you also provide the register dump for the concerned I2S under /sys/kernel/debug/regmap/, to check whether the I2S got enabled as expected?
