In order to support future hardware development I have been doing some investigation to see if it is possible to configure the frequency of the I2S AUDIO_MCLK output. Currently we have measured the frequency to be 11.28 MHz. According to the documentation  section 4.6, the I2S interface supports a clock rate up to 24.5760 MHz.
I have looked at the Tegra X1 Technical Reference Manual  as well and I admit that it is more low-level than I am used to. Suffice to say that while it appears that it should be possible to operate AUDIO_MCLK at a different frequency.
Can anyone offer me any guidance on
- where I should look to see the currently configured clock rate of 11.28MHz
- how I would approach configuring the clock rate to a different value.