In order to support future hardware development I have been doing some investigation to see if it is possible to configure the frequency of the I2S AUDIO_MCLK output. Currently we have measured the frequency to be 11.28 MHz. According to the documentation [1] section 4.6, the I2S interface supports a clock rate up to 24.5760 MHz.
I have looked at the Tegra X1 Technical Reference Manual [2] as well and I admit that it is more low-level than I am used to. Suffice to say that while it appears that it should be possible to operate AUDIO_MCLK at a different frequency.
Can anyone offer me any guidance on
where I should look to see the currently configured clock rate of 11.28MHz
how I would approach configuring the clock rate to a different value.
By default the AUD_MCLK is configured to be 256x the sampling rate. So if you are playing audio at 48kHz the AUD_MCLK will be 12.288MHz and if the sampling rate is 44.1kHz then it will be 11.28MHz (which is probably what you are seeing).
The reason why it is scaled by 256x is because this is a common scaling factor used by audio codecs when the codec is the I2S slave. This can be changed via the ‘mclk-fs’ device-tree property [0]. It is also possible to configure the AUD_MCLK to be a fixed clock rate via the nvidia,mclk-rate property in DT [1].
You can also check the current frequency that is configured by viewing the output from the clk_summary debugfs entry …
We are in the process of updating the audio documentation for L4T and should be available soon.
For more details on the actual I2S interface itself, please refer to the Tegra X1 TRM [0]. Please refer to chapter ‘CHAPTER 23: AUDIO PROCESSING ENGINE’.
I’ll pass on the information to the relevant people. I am sure it will take us some time to digest the new information but we will get back to you if there are any further questions.
Just to let you know that we have identified an issue with the Jetson.IO tool on Nano when updating Nano using SD card image. However, there is a simple fix availabe. Details are here: