No DSI MIPI data on custom carrier board

Hello!

We are developing a custom carrier board for TX2NX and are in the testing phase but we have encountered weird issue. So we have tried testing DSI display on Xavier NX development board - soldered wires directly from TX2NX DDR4 connector to the display connector, so there’s nothing between TX2NX DSI CLK and display CLK input pin - and the display works fine.

However, when we connect the display to our carrier board, where DSI is connected directly to display connector as well - the Jetson doesn’t give DSI CLK.

Here’s the dmesg error that happens, when trying to connect our carrier board. We have also noticed that Nvidia Devkit has some EEPROM - could it be, that DTS reads the EEPROM and only allows DSI on Nvidia Devkits?

[    0.733786] tegradc 15200000.nvdisplay: disp0 connected to head0->/host1x/dsi
[    0.733938] tegradc 15200000.nvdisplay: No hpd-gpio in DT
[    0.733990] tegradc 15200000.nvdisplay: DT parsed successfully
[    0.734022] tegradc 15200000.nvdisplay: Display dc.ffffff800b3e0000 registered with id=0
[    0.739774] tegradc 15200000.nvdisplay: vblank syncpt # 8 for dc 0
[    0.739790] tegradc 15200000.nvdisplay: vpulse3 syncpt # 9 for dc 0
[    0.743956] tegradc 15200000.nvdisplay: probed
[    2.942139] tegradc 15200000.nvdisplay: fb registered
[    3.037730] tegradc 15200000.nvdisplay: dc_poll_register 0x41: timeout
[    3.037734] tegradc 15200000.nvdisplay: timeout waiting for postcomp init state to promote
[    3.089726] tegradc 15200000.nvdisplay: dc_poll_register 0x41: timeout
[    3.096309] tegradc 15200000.nvdisplay: timeout waiting for win assignments to promote
[    3.184053] tegradc 15200000.nvdisplay: tegra_nvdisp_head_enable, failed head enable
[    9.105474] tegradc 15200000.nvdisplay: blank - powerdown
[    9.105484] tegradc 15200000.nvdisplay: unblank
[    9.157773] tegradc 15200000.nvdisplay: dc_poll_register 0x41: timeout
[    9.157776] tegradc 15200000.nvdisplay: dc timeout waiting for DC to stop
[    9.209751] tegradc 15200000.nvdisplay: dc_poll_register 0x41: timeout
[    9.209754] tegradc 15200000.nvdisplay: dc timeout waiting for DC to stop
[    9.261753] tegradc 15200000.nvdisplay: dc_poll_register 0x41: timeout
[    9.261757] tegradc 15200000.nvdisplay: timeout waiting for postcomp init state to promote
[    9.313732] tegradc 15200000.nvdisplay: dc_poll_register 0x41: timeout
[    9.313736] tegradc 15200000.nvdisplay: timeout waiting for win assignments to promote
[    9.313739] tegradc 15200000.nvdisplay: tegra_nvdisp_head_enable, failed head enable
[    9.379481] tegradc 15200000.nvdisplay: unblank

P. S. The difference between Nvidia Devkit and our custom carrier board is:

Nvidia:

[    0.435989] iommu: Adding device 15200000.dc_common to group 28
[    0.436459] iommu: Adding device 15200000.nvdisplay to group 29
[    0.436772] iommu: Adding device 15210000.nvdisplay to group 30

Our board:

[    0.436701] iommu: Adding device 15200000.dc_common to group 28
[    0.436754] platform 15200000.dc_common: OF IOVA linear map 0x96085000 size (0x800000)
[    0.436811] platform 15200000.dc_common: OF IOVA linear map 0x96081000 size (0x2008)
[    0.436855] iommu: Adding device 15200000.nvdisplay to group 29
[    0.436903] iommu: Adding device 15210000.nvdisplay to group 30

Does the Jetson check any of the DisplayPort or HDMI pins? As they are left floating for us. (I left DisplayPort @15210000 on purpose, so I can connect to display Nvidia Devkit). We also tried booting with DisplayPort disabled - same problem.

How else could it be physically possible that identical software behaves differently on direct MIPI connections?

Hi,

The weird part for me is your comment sounds like you didn’t configure any device tree at all.

Also, where do you connect the DSI panel to the module and devkit? Of course jetson checks the DP and HDMI ports because they are the default display on the devkit.

No, no - I have obviously everything working in DTS because it works when plugged in to Nvidia Devkit. I have disabled the HDMI and tried with DisplayPort enabled and disabled.

We connected DSI panel to Nvidia Devkit just by soldering tiny wires directly from DDR4 connector on the devkit to the display. I mean literally everything works as intended on Nvidia Devkit. This is not a question on how to bring up DSI display but about this Tegra tegradc driver

I found this article: TX2i tegra_nvdisp_head_enable fails if HDMI is connected after boot - #7 by richardsearle

Could it be that EVEN if the HDMI and DisplayPort is disabled in device tree, Nvidia Jetson checks for HPD DP and HDMI pins? They are left floating in our board.

Hi,

Please reply my question first.

  1. Do you configure anything in the device tree in devkit case and your custom board case? If so, what did you change?

  2. I am not hardware guy so could you tell me what is the exact pin you connect from the “DDR4 connector”?

  3. Could you share your full dmesg for both the custom board case and devkit case?

  1. I added
  • Custom panel .dtsi and .c, added to Makefile and Kconfig so it compiles
  • My panel to of_dc.c, board-panel.c, board-panel.h

In tegra186-p3636-0001-p3509-0000-a01.dtsi I changed:

	host1x {
		nvdisplay@15200000 {	// MIPI Display
			status = "okay";
			nvidia,dc-or-node = "/host1x/dsi";
			nvidia,dc-connector = <&dsi>;
			nvidia,fb-win = <0>;
			win-mask = <0x7>;
		};
		nvdisplay@15210000 {	// DisplayPort
			status = "disabled";
			nvidia,dc-or-node = "/host1x/sor";
			nvidia,dc-connector = <&sor0>;
			nvidia,fb-bpp = <24>;
			nvidia,fb-win = <3>;
			win-mask = <0x38>;
		};
		dsi {
			status = "okay";
			nvidia,active-panel = <&panel_s_model4>;
			panel-s-model4 {
				status = "okay";
			};
		};
		sor {
			status = "disabled";
			nvidia,active-panel = <&sor0_dp_display>;
			dp-display {
				status = "disabled";
			};
		};
		sor1 {
			status = "disabled";
			nvidia,active-panel = <&sor1_hdmi_display>;
			hdmi-display {
				status = "disabled";
			};
		};
		dpaux@155c0000 {
			status = "disabled";
		};
		dpaux@15040000 {
			status = "disabled";
		};
	};
};

And in tegra186-p3636-0001-a00-disp.dtsi

dsi {
			nvidia,dsi-controller-vs = <DSI_VS_1>;
			status = "disabled";
			nvidia,active-panel = <&panel_s_model4>;
			nvidia,dsi-csi-loopback;
			panel-s-model4 {
				status = "disabled";
			};
		};
  1. We connected DSI display to
    DSI_CLK_P (Pin #78), DSI_CLK_N (76), DSI_D0_P (84), DSI_D0_N (82), DSI_D1_P (78), DSI_D1_N (76) pins on BOTH carrier boards. (Yes, I know Devkit doesn’t have a connector, we soldered tiny wires directly on the pins of the Jetson main connector - it works)

P. S. The logs are with DisplayPort enabled because I needed a display output for Nvidia Devkit - nothing changes with DP disabled.
3. Attached both logs (Custom_log.txt is our carrier board, Devkit_log.txt is Nvidia devkit board log)
Custom_log.txt (54.3 KB)
Devkit_log.txt (72.9 KB)

We are mostly concerned that tegra_dc driver check HPD (Hot plug detection) pins as they are the only difference between Nvidia Devkit and our carrier board. Can somebody at Nvidia please check on HPD pin usage even with disabled HDMI, DP in DeviceTree?

Thank you!

No, the hpd pin will have no use if SOR and corresponding tegradc is disabled. You already tried to disable the DP on devkit so you shall know that.

Well yeah, it obviously should be like that. It’s just that HPD pins are the only thing that’s different from our board to Nvidia regarding display pins, that’s why we were wondering.

What else could we check?

Are you sure the power sequence and that panel is really powered on?

It is powered correctly - both power input is 3.3V and reset pin is correct. As for anything else - nothing happens with display if MIPI DSI init commands are not sent so I don’t see anything else I could check

If you suspect the software side has the problem, then you can compare the whole device tree under /proc/device-tree.

Also, you can disable DP on devkit case too to make sure the display DT are all the same.

Yes, we tried using identical software and with DisplayPort disabled - plugged in TX2NX in Nano Devkit - DSI display works fine. Then plugged in our Carrier board and then the DSI timeout happens. :(

You can try to add some debug print in those kernel function and compare the result between devkit and your board.

Okay, so my colleague added PullUp to HPD pins and the display started working.

We are very disappointed by the Nvidia documentation - how is it not mentioned ANYWHERE that HDP pins are used EVEN with DTS disabled? They are obviously being used! Please, add in Nvidia documentation that HPD pins can mess with tegradc driver and DSI CLK

I am no hardware guy so cannot comment on this. I will inform them about this and see if they have anything to update.

Thanks for reporting this.

1 Like

Thanks for your help! Please do - so people in the future will not have problems like this.

Hi,

  1. Could you also share the full dts file (converted from dtb) for both your devkit case and custom board case?

  2. Do you have the schematic of your custom board to share? If you don’t want to put it in public, you can send it to me with private message.

You are using the nvdisplay that was using for HDMI port on devkit for DSI on your custom board, is that right?

If so, could you remove the hpd-gpio property in your dts and remove that pull up to the HPD pin and see if it would matter?

  1. I will share it later as we are continuing our development today.
  2. Here’s the Display pin part:
  1. Yes, exactly
  2. We tried this as well. It didn’t change anything.

So the DP1_HPD (pin #96) and (HDMI HPD) DP0_HPD (pin #88) needs Pullup always, if you want any display to work on a custom board. It’s not documented anywhere in electrical schematics/bringup guides, etc.