Hi All,
I searched JetsonXavierNXDatasheet_v1.6 and Jetson_Xavier_NX_Product_Design_Guide_DG-09693-001_v1.2 , I can not find out the NX peak current as a reference for my power design.
I find the close item as below on NX data sheet 2.9.
The power monitor triggers CPU/GPU hardware throttling to keep power within budget.
• INA warning signals lite GPU throttling (50%) when VDD_IN average power (512 samples) exceeds 15W
• INA critical signal triggers lite CPU+GPU throttling (50%) when VDD_IN instantaneous power exceeds 18W
But I’m still confused on this, the average power VDD_IN (512 samples) <–What is the duration of 512 samples?
And when VDD_IN instantaneous power exceeds 18 W ← Does this mean NX will not exceed 3.6 A at peak current?
There are power monitor chips in module to monitor VDD_CPU and VDD_GPU to keep the power consumption under threshold, in general customer only need to know the threshold. 512 samples duration is internal setting of INA chip which is not public. 18W is for CPU+GPU only, the VDD_IN might include other powers.
Hi Trumany,
I want to know, about carried board 5V power design, if it only supply power to NX module, how do I set the OCP point? 10A? 15A?
Could Nvidia provide any data for reference?
Hi Trumany,
Did you mean NX peak current will not over 5A?
Is it possible when NX running some burn-in test that the current peak will be higher than 5A?
Hi Trumany,
The measurement point at VDD_IN pin, there is a current sense resistor, and I used the current probe to measure IDD.
According to NX datasheet description as below, I think it should trigger the throtting.
INA critical signal triggers lite CPU+GPU throttling (50%) when VDD_IN “instantaneous power exceeds 18W”
For your reference, I run https://web.basemark.com/ by chorme broswer and when the test item running at shader pipeline test, the NX peak current will arrive 9.5A.
Hi Trumany,
I run the tegrastats, there are shown as below
VDD_IN 14895/6641, VDD_CPU_GPU_CV 9492/2828, VDD_SOC 2056/1447
How to know the data achieve the power limit?
BTW, 6 CPUs loading between 30-70%, GPU loading at 99% when the test item running at webGL 2.0 test & shader pipeline test.
We are having a similar problem in designing a power system. The EVK has a 22A OCP, yet the max current should be 5A? Can NVIDIA provide an OCP recommendation for carrier board designs on the 5V rail? We have a system designed with 5-7A OCP but the module trips and resets. We also measured the EVK to be much higher than 5A up to the 9.5A that @terence.wang mentioned. How much power should we design for the module assuming we will run it at maximum load?
Is there a version of this document for the NX module? Nevermind, I see that the 5V rail is the only possible value. None of this information explains why the system seems to draw much more than 5A
Hi our system is also having similar issue with peak current going up to 9A. What is the response time of the INA power monitor? Could instantaneously spike (peak) in range of 10-30 uS peak gets through ?
The sampling duration is adjustable. You can get the system status with tegrastats to check if threshold reached. The peak current should be measured only on VDD_IN and exclude other rails or charging current of capacitors.
Right but if the peak current demand is response time is faster than the sampling rate of the INA or the response time of the processing, what would happen? Could this contributing to the high peak current we are seeing here? How do we adjust the sampling duration?
Power monitor has its own mechanism to do with that, like average calculating or others. For customer, only needs to follow the design guide and the schematic checklist to make the power part design and has no need to concern the instant peak current which won’t trigger INA to throttle.