HDMI 线上串阻 目前设计的是6ohm，高温74 度满载测试时，显示屏花屏，后将串联电阻改为5.1ohm后，高温同样测试条件，HDMI 显示正常，帮忙给出HDMI 查分数据线 串阻的最优设计值和设计指南，并帮忙解释高温5.1ohm 正常显示的原理，谢谢
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Thank you for sharing your test results.
- RS value: The Jetson Orin NX Series and Orin Nano Series Design Guide (HDMI Interface Signal Routing Requirements) specifies RS ≤ 6Ω (±10%) on the HDMI P/N lines. There is no single optimal value. RS should be tuned on your board so that it passes the HDMI 2.0 compliance tests: eye diagram, Vlow, and HF1-9 TDR. 0Ω is also acceptable if your design passes HF1-9. Also check that RS is placed as the last component before the HDMI connector, after the AC caps, pull-downs, and ESD.
- Why 5.1Ω works at high temperature: The series resistor reduces the signal swing and eye opening at the receiver. At high temperature, trace and cable losses increase, so the 6Ω design likely ran out of eye margin. A lower RS reduces this loss and restores margin. We recommend measuring the HDMI eye diagram at 74°C with an HDMI test fixture, and running the compliance tests above with the final RS value, to confirm there is enough margin.
thanks，we pass HDMI 1.4 compliance test with 6ohm RS value，but when i change RS to ohm，the display shows nothing 25°C，i am confused，does 0hm fit better than other RS values？ can we simulate like SI tools to find the best fit RS values？
Thank you for the update.
- Rework check: 0Ω by itself is unlikely to cause a completely blank display, because it only changes the signal amplitude slightly. Please first check the rework on all 8 TMDS lines for open joints, solder bridges, or damaged pads.
- HPD and EDID check: With 0Ω installed, please check whether HPD is detected and EDID is read correctly, for example in
dmesg. If either fails, the TMDS output is not enabled at all and the display stays blank, regardless of the RS value. - Confirm with the same board: Please change RS back to 5.1Ω or 6Ω and check whether the display recovers. This confirms whether the issue happens only with 0Ω.
- RS is not “lower is better”: RS does more than attenuate the signal. It also helps with source impedance matching and reflection damping, and it affects the Vlow and HF1-9 TDR results. 0Ω is allowed only if the design passes HF1-9. If the display fails only with 0Ω, then 0Ω is not the right value for your board. RS should be tuned per board within ≤ 6Ω (±10%).
- SI simulation: Yes, you can simulate this. Please refer to the Jetson Orin NX Series and Jetson Orin Nano Series Signal Integrity Simulation Application Note on the Jetson Download Center. Use the Orin DP/HDMI IBIS-AMI model and package S-parameters together with your extracted carrier-board channel S-parameters and the HDMI compliance cable/EQ model (available from HDMI Forum). Then sweep the RS value and compare the eye margin.
