Someone else will probably have to finish answering, but I want to point out some details you might not know about. First, most Jetsons use 3.3 V because they go through a level converter. The output levels at the SoC itself is 1.8 V. Developer kits should have a jumper to the level converter, and the default would be to convert to 3.3 V. You’d have to consult the docs for where the jumper is; the jumper will have no effect if you are looking at the input side of the level converter.
Second, if flow control is enabled, then I would expect a lack of CTS/RTS also being looped back to cause traffic in only one side/direction.
For the case of 1.8 V feeding a 3.3 V input, then this should fail due to levels. For the case of correct levels, then traffic will be visible in one direction without other error.
Also, if you have a custom or third party carrier board and are working on the device tree, then typically you would see each UART listed with an alias like “serial@<some physical address>”. You’d have to customize for any differences from the default dev kit UART. If this is a dev kit, then no change is needed.
The L4T release can be found with “head -n 1 /etc/nv_tegra_release”. You can then go here to find everything you need for that specific release if this is an actual dev kit and not a custom or third party carrier board: https://developer.nvidia.com/linux-tegra
Thank you for your response.
The issue has been identified.
OS: Linux tegra-ubuntu 5.15.148-rt-tegra
Originally, on the Jetson Orin Nano reference board, UART0 is connected to the M.2 KEY-E (WiFi/Bluetooth).
Since the reference board does not have the UART0 DTS ported, it was not functioning.
The /dev/THS2 is not actually pointing to UART0.
To make it work, we just need to:
Add the UART0 DTS code to the kernel.
Modify the bootloader settings related to TX and RX.
Once these changes are made, UART0 will function properly.