Power Management Issues for PCIE

I found the configuration of the PCIE PADCTL registers in the “NVIDIA Orin Series System-on-Chip” .PDF file. But I can’t find the registers in the kernel file, how do I go about finding this file?


This shall be already handled by pcie driver and you don’t need to configure them by yourself.

So this file can’t be changed?

It is the file you don’t need to modify… just clarify the problem of what you got here first…

um… I’d like to try to see if I can disable the power management of the PCIE clock through here.

So, can I disable the power management of the PCIE clock here?

Not sure what kind of power management you are talking about. Is there any feature name about what you are asking?

PCI-Compatible PM section.

Please try to check from driver or device tree aspect for this instead of checking from register.

I have been trying to look for these in the driver, but haven’t had much luck. I was actually just wondering if it is possible to disable the CLKREQ pin and function by disabling it on the software side?

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