Problem Disabling UART7

I am using a custom board connected to the Jetson Tx2, that unfortunately has UART7 and UART4 connected together.
That is UART7 Tx to UART4 Tx and UART7 Rx to UART4 Rx. I need to use UART4 and so need to disable UART7 so that Tx and Rx are high impedance and cannot interfere with the operation of UART4. (Alternatively disable UART4 and use UART7 but I’ve been unable to get UART7 working as I think it is used as a debug port.)

I have followed the following steps:

  1. modified the Jetson-TX2-Generic-Customer-Pinmux-Template spreadsheet (v1.05) so that UART7_TX and UART7_RX are both set to unused.
  2. Generated the gpio, pad and pinmux dtsi files from the spreadsheet and Dos2Unix’d them.
  3. Created the tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg and tegra186-mb1-bct-pad-quill-p3310-1000-c03.cfg using and copied the newly created .cfg files to …/Linux_for_tegra_tx2/bootloader/t18ref/BCT/ directory.
  4. Ran “sudo ./ -r jetson-tx2 mmcblk0p1” to update my Jetson Tx2 board.

After completing the above I can see no difference, it looks as though UART7 Tx and Rx may still be being driven and thus I cannot use UART4.
Can anyone see any reason why the above procedure would not result in UART7 being disabled?
Is there a way of seeing what the pinmux settings are on a Tx2 board so that I can confirm if UART7 has been disable or not?

I’ve attached the log, the .dtsi files generated from the spreadsheet (with extensions changed to .txt to allow attaching) and the .cfg files (also with .txt extensions).

Any help would be greatly appreciated.

FlashLog.txt (27.7 KB)
tegra18x-jetson-tx2-config-template_uart7notused-gpio_dtsi.txt (2.11 KB)
tegra18x-jetson-tx2-config-template_uart7notused-padvoltage_dtsi.txt (1.2 KB)
tegra18x-jetson-tx2-config-template_uart7notused-pinmux_dtsi.txt (50.2 KB)
tegra186-mb1-bct-pad-quill-p3310-1000-c03_cfg.txt (513 Bytes)
tegra186-mb1-bct-pinmux-quill-p3310-1000-c03_cfg.txt (27.4 KB)

hello tslade,

couple of comments need your feedback,

  1. please have a try to flash the board by excluding the “-r” options
  2. could you please check the device tree, is the modification change as expect

Hi JerryChang
Thanks for the reply.

I just tried flashing the board excluding the -r option, this overwrote all the changes I had made to the file system (such as setting static IP addresses) but unfortunately UART7 still seems to be working, I can see it putting out some sort of trace on power up.

Which device tree file should I check do you mean the .dtsi file created from the spreadsheet? if so I can see the change, uart7_tx_pw6 and uart7_rx_pw7 pin sections have been moved from pinmux_default to pinmux_unused_lowpower.

Is disabling something in the spreadsheet, creating .dtsi files, craeting pinmux and pad .cfg files and then flashing the unit sufficient to disable something such as a UART. I think that this would be done early on in the boot chain by MB1, though I may be a little confused as I am new to the TX and L4T. Is there anything else that would need changing in order to disable the UART or is it just the (.cfg) pinmux configuration file used by MB1 ?

Many Thanks

hello tslade,

please refer to [NVIDIA Tegra Linux Driver Package]-> [Development Guide]-> [TX2 Configuring Pinmux GPIO and PAD],
you need to customize pinmux spreadsheet and convert it into another cfg files for flashing.
there are convert stages to dtsi and then cfg files, please also check the modification is correct.

Hello JerryChang

Thanks for the reply.
That is the procedure that I followed from the [NVIDIA Tegra Linux Driver Package]-> [Development Guide]-> [TX2 Configuring Pinmux GPIO and PAD]. I got no errors but when I flash the unit UART7 still appears to be pumping out debug information, so is clearly not disabled.

I’m not sure exactly how to check if the modification is correct, the tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg file has changed. Uart7_tx_pw6 and uart7_rx_pw7 are now under “#### Pinmux for unused pins for low-power configuration ####” which I would think was a good sign.

The tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg contains the following:

Pinmux for unused pins for low-power configuration

pinmux.0x0c302040 = 0x00000415; # uart7_tx_pw6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0c302038 = 0x00000415; # uart7_rx_pw7: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable

When I flash my unit there does not appear to be any difference, Uart7 still sends out debug info at startup.
Is there anything else I need to do to disable Uart7 tx and rx, I need them to be disabled so that they do not interfere with the other Uart I’m using as they are connected on our custom base board.

I attached the config files in my original post.

You can always extract the running system’s device tree to see if changes went in (preferably extract before and after a change…that way all you have to do is “diff” the trees):

dtc -I fs -O dts -o extracted.dts /proc/device-tree

Hi Linuxdev thanks for the replay
I have not actually changed the device tree as I believe uart7 is already disabled. I’ve just changed the pinmux to set uart7 as unused as it was enabled and used by something (possibly the bootloader I’m not sure) as a debug port. However I still see debug info coming out of the port for uart7 on power up.
I as suggested I used dtc to check the device tree on the running system and UART7 appears to be disabled, see below.
serial@c290000 {
reg = <0x0 0xc290000 0x0 0x40>;
dmas = <0x19 0x2 0x19 0x2>;
interrupts = <0x0 0x76 0x4>;
reg-shift = <0x2>;
compatible = “nvidia,tegra186-hsuart”;
clock-names = “serial”, “parent”;
reset-names = “serial”;
nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
clocks = <0xd 0xd8 0xd 0x10d>;
resets = <0xd 0x70>;
nvidia,memory-clients = <0xe>;
status = “disabled”;
phandle = <0x7d>;
#stream-id-cells = <0x1>;
dma-names = “rx”, “tx”;
linux,phandle = <0x7d>;

What I really need is the UART7 Tx and Rx pins to be set high impedance so that they play no part in anything connected to them. This is because unfortunately we have them connected erroneously to the Tx and Rx of another port that we are using on our custom base board.
Should settting them as unused in the pinmux achieve this and is there any way to check the pinmux settings on a running system?
Am I right in thinking if something is set unused in the pinmux then it should not matter what the device tree is set to it will not work as it is disabled in the hardware?

Many Thanks

I can’t answer whether those pins will float with just the “disabled”. The device tree is in fact what the PINMUX changes, so this should be definitive by extracting via dtc. The trouble is that it may not be obvious from disabling UART7 as to whether or not this causes the pins to float. Someone else will have to answer that.

Ok Thanks linuxdev.
I’m a little confused about the pinmux / device tree interaction. So are you saying that flashing a modified pinmux configuration (.cfg file) on to the TX2 will change the device tree on the running unit, if so does it override the device tree file (.dtb) flashed on to the unit?

As for making the pins float perhaps if instead of disabling I set them as GPIO inputs with no pull up or pull downs this might have the desired effect, does anyone know?

Many Thanks.

That is correct. The PINMUX spreadsheet is just a higher level tool for creating a device tree. Normally one would replace a device tree with a tree generated via the spreadsheet.

I’m not sure of the “.cfg” file relation other than picking which tree to use. The tree as a whole is usually in different parts in different places, but then gets assembled as a whole for the actual Jetson. For example, there is a shared PINMUX/tree for modules which are the same, and another PINMUX/tree for different carrier boards…the two work together.

Not all pins are GPIO, and although some functions can be disabled via device tree, it doesn’t mean they have other functions available. I don’t know anything about the pins of UART7…device tree could define parts of this UART’s behavior, but if it isn’t GPIO, then perhaps it isn’t possible to float the pins…don’t know.

I have made some progress with disabling UART7 (on L4T 28.1) and have proved that it is possible.
Using the “Nvidia Parker Serial Soc Technical Reference Manual” I found the PinMux addresses for UART7 Rx and Tx (0x0c302038 and 0x0c302040). The manual also has the description of the bitfields used to control the Tx and Rx PinMux (see PADCTL_AO_UART7_RX_0 and PADCTL_AO_UART7_TX_0).

Using devmem2 utility I can write to the PinMux on the running unit, by writing the correct word to the PinMux for UART7 Tx and Rx I can disable the UART.
This works and allows me to use the other UART that we have erroneously connected to UART7, which is all good. However I am unable to modify the PinMux to disable UART7 using the recommended methods. Below is what I have tried, could anyone tell me if I’m doing something wrong, now that I know it is possible I really what to update the device tree / PinMux configuration to disable UART7.

  1. Change the PinMux spreadsheet to disable UART7 Tx and Rx.
    2 Generate the DTSI files from the spreadsheet and Dos2Unix them.

  2. Using create pinmux and pad PinMux config files (.cfg).
    Note I can see PinMux settings for UART7 Tx and Rx in the generated PinMux config file and the values they are set to appear correct according to the bitfield description in the Technical Reference Manual.
    pinmux.0x0c302040 = 0x00000415; # uart7_tx_pw6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
    pinmux.0x0c302038 = 0x00000415; # uart7_rx_pw7: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable

  3. Copy the generated PinMux config files to tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg and tegra186-mb1-bct-pad-quill-p3310-1000-c03.cfg in …/bootloader/t186ref/BCT

  4. Flash the Tx2 unit. ( jetson-tx2 mmcblk0p1)

Once the unit had been flashed Uart7 was still enabled and using devmem2 I could read the PinMux addresses and see that they were still set to 0x448 rather than 0x415 as specififed in the pinmux config files just flashed to the unit.
So I though perhaps something is over riding these PinMux settings later on the boot process, perhaps the device tree.

Next I performed the following to try to update the device tree to disable UART7.

  1. Using dtc I created a .dts file from …/Linux_for_Tegra_path/kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb
  2. Looking at the DTSI file generated from the spreadsheet with UART7 disabled I identified the section that had changed to disable UART7 and pasted this in to my .dts file created in step 1.
  3. Used dtc to create a new tegra186-quill-p3310-1000-c03-00-base.dtb from the modified .dts
  4. Flashed the new DTB file to the Tx2 unit. (flash -r -k kernel-dtb jetson-tx2 mmcblk0p1).

This appeared to make no difference, as UART7 was still enabled and reading the PinMux addresses for UART7 Tx and Rx still showed 0x448 rather than the desired 0x415 needed to disable them.
However the device tree update had been successful as creating a .dts from /proc/device-tree showed that the code I had added to try to disable the UART7 was present.
pinmux_unused_lowpower: unused_lowpower {
uart7_tx_pw6 {
nvidia,pins = “uart7_tx_pw6”;
nvidia,function = “rsvd1”;
nvidia,pull = <1>;
nvidia,tristate = <1>;
nvidia,enable-input = <0>;
nvidia,lpdr = <0>;

		uart7_rx_pw7 {
			nvidia,pins = "uart7_rx_pw7";
			nvidia,function = "rsvd1";
			nvidia,pull = <1>;
			nvidia,tristate = <1>;
			nvidia,enable-input = <0>;
			nvidia,lpdr = <0>;

Is there anything wrong with the methods I’m using to upadate the PinMux and device tree? if not why can I not set the PinMux to the values in the PinMux config file.
I really need to be able to set the PinMux to our desired values if we are to be able to use the Tx2 with any hardware other than the supplied development board. Our intention is to use it with our own custom hardware.
Sorry for the rather long post, any help with this would be greatly appreciated.
Many Thanks

hello tslade,

since you have confirm the correct device tree settings to disable UART7.
could you please help us to narrow down the issue, please check the device tree settings generated by pinmux spreadsheet is correct?
for example, please check the UART7 corresponding fields in tegra18x-jetson-tx2-pinmux.dtsi.

I think that the generated pinmux spreadsheet must be correct as I generate the PnMux.cfg file from this. The PinMux config file contains the lines
pinmux.0x0c302040 = 0x00000415; # uart7_tx_pw6: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable
pinmux.0x0c302038 = 0x00000415; # uart7_rx_pw7: rsvd1, pull-down, tristate-enable, input-disable, lpdr-disable

When I set addresses 0x0c302040 and 0x0c302038 to 0x415 on the running system using devmem2 it does disable UART7.
I think if the address / value pairs in the PinMux config file are correct and this is generated by the spreadsheets made DTSI file then that must be correct as well.
It’s just that even though the lines in the PinMux config file appear to be correct flashing the unit with the PinMux file and device tree don’t seem to cause addresses 0x0c302040 and 0x0c302038 to have the correct values and thus the UART7 is not disabled.

I’ve checked the text output and it contains the following lines, suggesting that first copies tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg somewhere and then uses something called to flash it to my Tx2.

copying pinmux_config(/home/fom/Tslade/TX2/64_TX2/Linux_for_Tegra_tx2/bootloader/t186ref/BCT/tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg)… done.

./ --bl nvtboot_recovery_cpu.bin --sdram_config P3310_A00_8GB_Samsung_8GB_lpddr4_204Mhz_A02_l4t.cfg --odmdata 0x1090000 --applet mb1_recovery_prod.bin --cmd “flash; reboot” --cfg flash.xml --chip 0x18 --misc_config tegra186-mb1-bct-misc-si-l4t.cfg --pinmux_config tegra186-mb1-bct-pinmux-quill-p3310-1000-c03.cfg --pmic_config tegra186-mb1-bct-pmic-quill-p3310-1000-c04.cfg --pmc_config tegra186-mb1-bct-pad-quill-p3310-1000-c03.cfg --prod_config tegra186-mb1-bct-prod-quill-p3310-1000-c03.cfg --scr_config minimal_scr.cfg --scr_cold_boot_config mobile_scr.cfg --br_cmd_config tegra186-mb1-bct-bootrom-quill-p3310-1000-c03.cfg --dev_params emmc.cfg --bins “mb2_bootloader nvtboot_recovery.bin; mts_preboot preboot_d15_prod_cr.bin; mts_bootpack mce_mts_d15_prod_cr.bin; bpmp_fw bpmp.bin; bpmp_fw_dtb tegra186-a02-bpmp-quill-p3310-1000-c04-00-te770d-ucm2.dtb; tlk tos.img; eks eks.img; bootloader_dtb tegra186-quill-p3310-1000-c03-00-base.dtb”

So in summary:

  1. I know the device tree change to disable UART7 is ok because the lines in it are the same lines that produce the PinMux config lines that hold the address / value pairs that successfully disable UART7 when manually set on the running unit using devmem2.
  2. I know the device tree is successfully flashed as I can see the these changes when creating a DTS file from /proc/device-tree onteh running unit.
  3. From the text output it looks as though the correct PinMux config file is copied and flashed to the unit.

I don’t know where the PinMux config file should be flashed to, or which part of the startup uses it.
Please let me know if there is any more info I can give.
Many Thanks

hello tslade,

UART7 is used for BPMP debugging by default, please check Topic 1025679, and Topic 1025993 for reference.