Spi cs_change not working properly on jetson nano devkit module

Autonomous Machines Jetson & Embedded Systems Jetson Nano
1

Hello,

When cs_change is 1, there is no change in the waveform on the oscilloscope.
When using spi, there is no waveform change in the oscilloscope when cs_change is 1.

image
image1440Ă—1080 98.2 KB 

int SpiAccTransferDev(pJETSON_SPI_CTRL pSpiCtrl, int size, unsigned char* tx_buf, unsigned char* rx_buf)
{
	int ret;
	struct spi_ioc_transfer tr;
	int ntransfers = 1;

	fprintf(stderr,"vvvv%s(%d)[0x%02x,%d]\n", __FUNCTION__, __LINE__, *tx_buf, size);

	memset(&tr, 0, sizeof(struct spi_ioc_transfer));

	tr.tx_buf = (unsigned long)tx_buf;
	tr.rx_buf = (unsigned long)rx_buf;
	tr.len = size;		// The size mean byte count for tx_buf and rx_buf
	tr.delay_usecs 		= pSpiCtrl->spi_delay;
	tr.speed_hz 		= pSpiCtrl->spi_speed;
	tr.bits_per_word	= pSpiCtrl->spi_bits;
	tr.cs_change = 1;
	tr.pad = 0;

	ret = ioctl(pSpiCtrl->spi_device, SPI_IOC_MESSAGE(1), &tr);
	if (ret < 0){
		fprintf(stderr, "Error : It can't send spi message with (%s)\n", JETSON_SPI_DEVICE_PATH);
		return -1;
	}
	return ret;
}

What we want is that when cs_change is 1, there is a change in cs once when sending 2 bytes as shown in the figure below.
image

However, there is no change as shown below.

image
image676Ă—517 84.9 KB

Thank you.

3

Hello, @ShaneCCC

Do you have any advice for me about this thread?

Thank you.

4

I am checking internally will update once get result.

1 Like
5

Thank you.

Approximately when will I be able to receive an answer?

7

Hello, @ShaneCCC

Have you finished testing internally?

Thank you.

8

Hello,

Is there any progress?

Thank you.

9

Sorry still waiting internal developer to check it.

1 Like
10

Hello, @ShaneCCC

Thank you.

11

Hi @forumuser

I have a thought. It looks like in the oscilliscope waveform that CS is being set to 1 (deselecting peripheral SPI device) after the 2 byte transfer is complete. That leads me to believe the signals are acting as expected. So it looks like the state of the pin is able to change. If you are sending two bytes, maybe try breaking up the two byte transfer into 1 byte transfers? Then that should gaurantee that CS changes back to 1 (deselecting device) after the first byte is sent.

If you are currently sending two bytes in one transfer, I think my suggestion will solve the problem. If I understand correctly.

Or you can indicate

SPI_IOC_MESSAGE(2)

to specify two transfers, which means CS will change after transfer 1, then reselect the device at the beginning of transfer 2.

regards

1 Like
12

@forumuser
Could you confirm chip_select is using Hardware or software in the device tree ?
If it is hardware chip select CS change cannot be controlled by software.
Also dump the device tree to check will be greate.

sudo dtc -I fs -O dts -o extracted_proc.dts /proc/device-tree

1 Like
13

Try to remove “nvidia, enable-hw-based-cs” in the device tree under the spi@ scope to try.

1 Like
14

@ShaneCCC
With my experience, I have seen chip_select work with software. I had some bugs when I was writing my userspace SPI driver and was getting different results based on value of cs_change. I didn’t have logic analyzer to check though.

1 Like
15

Hello,

Can I avoid doing this for Jetpack versions other than 3.6.1?

I made and applied dtb for spi activation using jetson-io python program in devkit.

To remove enable-hw-based-cs, it is difficult with jetson-io, do you need to build dtb referring to the kernel customization part?

extracted_proc.dts (323.3 KB)
Thank you.

16

You can remove the enable-hw-based-cs from extraced_proc.dts and use dtc to convert it to dtb

dtc -I dts extraced_proc.dts -O dtb -o spi-rm-hw-cs.dtb
1 Like
17

Hello,

Afterwards, can I specify the dtb path below as FDT in extlinux.conf?

spi-rm-hw-cs.dtb

Or should I rename it to tgra210-p3448-0002-… ?

Thank you.

18

Hello, @ShaneCCC

I’m using jetson nano devkit
jp4.6.1

last extracked_proc.dts
extracted_proc_1.dts (321.4 KB)
spi-rm-hw-cs.dtb (233.2 KB)

Thank you.

19

Hello, @ShaneCCC

I did what you said, but no signal at all.
Before removing enable-hw-based-cs , the signal was there.

Thank you.

20

The extracted_pro_1.dts looks like didn’t configure the SPI pin correct.
Confirm the pin as below.

nvidia@nvidia-desktop:~$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg | grep -i spi
Bank: 1 Reg: 0x70003050 Val: 0x0000e044 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e044 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e048 -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e048 -> spi1_cs1_pc4
Bank: 1 Reg: 0x70003064 Val: 0x00006044 -> spi2_mosi_pb4
Bank: 1 Reg: 0x70003068 Val: 0x00006044 -> spi2_miso_pb5
Bank: 1 Reg: 0x7000306c Val: 0x00006044 -> spi2_sck_pb6
Bank: 1 Reg: 0x70003070 Val: 0x00006044 -> spi2_cs0_pb7
Bank: 1 Reg: 0x70003074 Val: 0x00006044 -> spi2_cs1_pdd0
1 Like
21

Hello,

Extract the extracted_proc.dts file created with the command sudo dtc -I fs -O dts -o extracted_proc.dts /proc/device-tree
dtc -I dts extraced_proc.dts -O dtb -o spi-rm-hw-cs.dtb After making spi-rm-hw-cs.dtb with this command

Can I specify /boot/spi-rm-hw-cs.dtb as FDT in extlinux.conf?

Thank you.

22

Yes, you can modify the extlinux.conf to load specific dtb file.