Hello,
we are currently developing a custom board based on T5000 with the system running JetPack 7.1 and R38.4.0 version.
When both SPI2(c6c0000.spi) and SPI3(810c440000.spi) are configured in Master mode, loopback test shows normal transmission and reception. However, when SPI2 is switched to Slave mode for cross-testing, SPI2 cannot receive any data at all.Conversely, when setting SPI2 as Master and SPI3 as Slave, the result is exactly the same.
/sys/devices/platform/bus@0/c6c0000.spi/spi_master/spi1/spi1.0/spidev/spidev1.0
/sys/devices/platform/bus@0/810c440000.spi/spi_master/spi2/spi2.0/spidev/spidev2.0
SOC_SPI2_MOSI <----> SOC_SPI3_MOSI
SOC_SPI2_MISO <----> SOC_SPI3_MISO
SOC_SPI2_SCK <----> SOC_SPI3_SCK
SOC_SPI2_CS <----> SOC_SPI3_CS
Tested with the tool from this link, no output is generated on the slave side at all.
The following are the test procedures and error logs.
$ echo 55 55 55 55 55 55 55 55 > pattern.txt
$ sudo ./spidev_test -D /dev/spidev1.0 -s1000000 -g8 -b8 -H -f pattern.txt -n1 -zzz -r
$ sudo ./spidev_test -D /dev/spidev2.0 -s1000000 -g8 -b8 -H -f pattern.txt -n1 -zzz -t
[ 10.801762] spi-tegra114 810c590000.spi: Adding to iommu group 31
[ 10.808790] spi-tegra114 810c440000.spi: Adding to iommu group 32
[ 10.812787] spi-tegra114 810c450000.spi: Adding to iommu group 33
[ 10.974649] spi-tegra124-slave c6c0000.spi: Adding to iommu group 37
[ 234.515698] spi_master spi1: transferred[0] != requested[8]
[ 234.515703] spi_master spi1: CMD[13f01827]: Sl M1 CS0 [HHHH] MSB MSb Rx Tx Pa 8b TRANS[00ff0000]:BSY I:255 B:0
FIFO[01400004]:RxF:2 TxE:64 Err[] RxSTA[] TxSTA[E]DMA[00000000]: RxTr:0 TxTr:0 B:7
[ 234.515714] spi_master spi1: cpu-xfer-err [status:01400004]
[ 234.515715] spi_master spi1: CMD[13f01827]: Sl M1 CS0 [HHHH] MSB MSb Rx Tx Pa 8b TRANS[00ff0000]:BSY I:255 B:0
FIFO[01400004]:Rx
The following is the SPI configuration I have completed.
spi@c6c0000 {
compatible = "nvidia,tegra210-spi-slave";
status = "okay";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00 0xc6c0000 0x00 0x10000>;
interrupts = <0x00 0x216 0x04>;
dma-coherent;
dma-names = "rx\0tx";
dmas = <0x133 0x08 0x08 0x808 0x133 0x08 0x12 0x808>;
iommus = <0x05 0x808>;
clocks = <0x02 0x2b 0x02 0xa0 0x02 0x01>;
clock-names = "spi";
assigned-clocks = <0x02 0x2b>;
assigned-clock-parents = <0x02 0xa0>;
resets = <0x02 0x25>;
reset-names = "spi";
spi-max-frequency = <0x2faf080>;
phandle = <0x28c>;
prod-settings {
#prod-cells = <0x04>;
prod {
prod = <0x00 0x194 0x80000000 0x00>;
};
};
spi@0 {
compatible = "tegra-spidev";
reg = <0x00>;
spi-max-frequency = <0x2faf080>;;
nvidia,enable-hw-based-cs;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x20>;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0f>;
};
};
};
spi@810c440000 {
compatible = "nvidia,tegra234-spi\0nvidia,tegra210-spi";
status = "okay";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x81 0xc440000 0x00 0x10000>;
interrupts = <0x00 0xa5 0x04>;
dma-coherent;
dma-names = "rx\0tx";
dmas = <0x133 0x0e 0x0e 0x80e 0x133 0x0e 0x18 0x80e>;
iommus = <0x05 0x80e>;
clocks = <0x02 0x2c 0x02 0x16>;
clock-names = "spi";
assigned-clocks = <0x02 0x2c>;
assigned-clock-parents = <0x02 0x16>;
resets = <0x02 0x26>;
reset-names = "spi";
spi-max-frequency = <0x2faf080>;
phandle = <0x2ad>;
prod-settings {
#prod-cells = <0x04>;
prod {
prod = <0x00 0x194 0x80000000 0x00>;
};
};
spi@0 {
compatible = "tegra-spidev";
reg = <0x00>;
spi-max-frequency = <0x2faf080>;
nvidia,enable-hw-based-cs;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x20>;
nvidia,rx-clk-tap-delay = <0x10>;
nvidia,tx-clk-tap-delay = <0x0f>;
};
};
};
Please help take a look at this issue.
Thanks!