SPI slave for L4T R28.1

I need two simultaneous SPI connections: master + slave

Using this forum I managed to set up /dev/spidev0.0 in master mode at spi@7000d400.

But unfortunately I can not find any working solution for slave mode.

Compiled spidev.ko and spi-tegra124-slave.ko from sources of L4T R28.1 for TX1

My master settings:

spi@7000d400 {
                compatible = "nvidia,tegra210-spi";
                reg = <0x0 0x7000d400 0x0 0x200>;
                interrupts = <0x0 0x3b 0x4>;
                nvidia,dma-request-selector = <0x6e 0xf>;
                iommus = <0x52 0xe>;
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                dmas = <0x6e 0xf 0x6e 0xf>;
                dma-names = "rx", "tx";
                nvidia,clk-parents = "pll_p", "clk_m";
                clocks = <0x41 0x29 0x41 0xf3 0x41 0xe9>;
                clock-names = "spi", "pll_p", "clk_m";
                resets = <0x41 0x29>;
                reset-names = "spi";
                status = "okay";

                prod-settings {

                ...

                };

                spi0_0 {
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        compatible = "spidev";
                        reg = <0x0>;
                        spi-max-frequency = <20000000>;
                        nvidia,enable-hw-based-cs;
                        nvidia,cs-setup-clk-count = <0x1e>;
                        nvidia,cs-hold-clk-count = <0x1e>;
                        nvidia,rx-clk-tap-delay = <0x1f>;
                        nvidia,tx-clk-tap-delay = <0x0>;
                };

My slave settings:

spi@7000d600 {
                compatible = "nvidia,tegra124-spi-slave";
                reg = <0x0 0x7000d600 0x0 0x200>;
                interrupts = <0 82 0x04>;
                nvidia,dma-request-selector = <0x5d 0xf>;
                nvidia,clock-always-on;
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                status = "okay";

                spi1_0 {
                        compatible = "spidev";
                        reg = <0x0>;
                        spi-max-frequency = <20000000>;
                };
        };

And in dmesg I get:

nvidia@tegra-ubuntu:~$ dmesg | grep spi
[    0.300322] tegra-pmc 7000e400.pmc: PMC: IO pad spi voltage is 1800000
[    0.308352] tegra-pmc 7000e400.pmc: PMC: IO pad spi-hv voltage is 1800000
[    3.167592] spi-tegra114 7000d400.spi: Static pin configuration used
[    3.168796] spi-tegra114 7000da00.spi: Static pin configuration used
[    7.182762] spi-tegra124-slave 7000d600.spi: Reset control is not found
[    7.207940] spi-tegra124-slave 7000d600.spi: Reset control is not found
[    8.182616] spi-tegra124-slave 7000d600.spi: Reset control is not found
[    9.383168] spi-tegra124-slave 7000d600.spi: Reset control is not found
[    9.435190] spi-tegra124-slave 7000d600.spi: Reset control is not found
[    9.548744] spi-tegra124-slave 7000d600.spi: Reset control is not found
[    9.752420] spi-tegra124-slave 7000d600.spi: Reset control is not found
[   10.104791] spi-tegra124-slave 7000d600.spi: Reset control is not found
[   10.204343] spi-tegra124-slave 7000d600.spi: Reset control is not found
[   10.289568] spi-tegra124-slave 7000d600.spi: Reset control is not found
[   10.357063] spi-tegra124-slave 7000d600.spi: Reset control is not found

@alexyr
Check device tree and ensure there is a handle for reset within master node.

spi1: spi@7000d600 {
…….
                resets = <&tegra_car TEGRA210_CLK_SBC2>;
                reset-names = "spi";
        };

Thanks for reply, ShaneCCC!

I found another example that worked for me, so I can see both spidev0.0 and spidev1.0:

spi@7000d600 {
                compatible = "nvidia,tegra124-spi-slave";
                reg = <0x0 0x7000d600 0x0 0x200>;
                interrupts = <0x0 0x52 0x4>;
                nvidia,dma-request-selector = <0x6e 0x10>;
                iommus = <0x52 0xe>;
                #address-cells = <0x1>;
                #size-cells = <0x0>;
                dmas = <0x6e 0x10 0x6e 0x10>;
                dma-names = "rx", "tx";
                nvidia,clk-parents = "pll_p", "clk_m";
                clocks = <0x41 0x2c 0x41 0xf3 0x41 0xe9>;
                clock-names = "spi", "pll_p", "clk_m";
                resets = <0x41 0x2c>;
                reset-names = "spi";
                status = "okay";

                prod-settings {
                        #prod-cells = <0x3>;

                        prod {
                                prod = <0x4 0xfff 0x0>;
                        };

                        prod_c_flash {
                                status = "disabled";
                                prod = <0x4 0x3f 0x6>;
                        };

                        prod_c_loop {
                                status = "disabled";
                                prod = <0x4 0xfff 0x44b>;
                        };
                };

                spi1_0 {
                        compatible = "spidev";
                        #address-cells = <0x1>;
                        #size-cells = <0x0>;
                        reg = <0x0>;
                        spi-max-frequency = <0x1312d00>;
                };
        };

Just curious, ‘Alexyr’.

How did you connect to the 2nd SPI pins, are you using the Nvidia TX1 Development kit?

That will be the next step, still don’t know. If I got it right, the pins are on J23 header.

I was afraid you would say that… It’s a little bit difficult to get access to the pins on the J23 Header for the sake of 3-4 SPI pins (unlike the J21 header). You will most likely need an adapter:

http://www.jetsonhacks.com/2015/11/13/nvidia-jetson-tx1-module-connector/

The connector on the Carrier board is a Samtec QSH-060-01-H-D-A. Note: This was reported in the Jetson forum to be linked to part number SEAM-50-02.0-S-08-2-A-K-TR. The mating connector is a Samtec QTH-060-01-H-D-A.

Thanks for the info, david_evans_g!

Here I found reference about spi2 (spi@7000d600) at J23:
https://devtalk.nvidia.com/default/topic/1014109/jetson-tx1/jetson-tx1-spi-slave-mode/post/5167487/#5167487

Here someone provided links to buy adapters:
https://devtalk.nvidia.com/default/topic/1024224/jetson-tx1/tx1-number-of-available-spi/post/5210758/#5210758

Hi guys,

I know you’ve done this for a long time, but I’m trying to configure and code the SPI on a Jetson Nano in slave mode.

Did you get it?

Do you have a piece of code where to start using spidev?

I have configured /dev/spidev0.0 in master mode and now I need to switch it.

Hi guys,

I’m trying to make a spi communication between Jetson TX2 and MPU9255. I’m new in this case. spidev_test.c is work fine with SPI0 but could you share a useful link for spi communication in Jetson TX2?

And I want to know how can I use others (spi1 and spi2)?

Thanks in advance.

Do you have the source code for spi slave?