Support for Multiple VC IDs on Single CSI Input with FPGA Aggregator + D3 16-Port FPD-Link Interface on Jetson Xavier

Robotics & Edge Computing Jetson & Embedded Systems Jetson Xavier NX
1

Hello,

I’m using the Jetson Xavier (Tegra194) platform along with a custom FPGA aggregator that takes 3 camera inputs and outputs them via a single CSI-2 link using 3 distinct Virtual Channel IDs (VC IDs 0, 1, and 2).

This CSI stream is passed through a serializer into the D3 Engineering 16-port FPD-Link III interface board, which simply relays the serialized signal to the Jetson Xavier via FPD-Link and a deserializer (e.g., TI UB960).

On the Xavier side, this aggregated CSI stream enters via a single CSI port.

My goal is to configure the device tree so that all 3 VC ID streams can be captured independently — ideally exposed as separate /dev/videoX nodes, each via its own VI port.

Questions:

  1. Does the Jetson Xavier (Tegra194) platform support demultiplexing multiple VC IDs over a single CSI-2 input into separate VI ports?
  2. If not, are there any supported workarounds — such as ISP bypass mode, software demux, or custom driver paths?
  3. Would this functionality be supported on Jetson AGX Orin or Orin NX instead?