Test Camera driver - media pipeline test Pattern

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
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Hi Team

Our hardware is based on an FPGA device that takes SDI input and outputs CSI data. The device is self-driven, so there is no I²C interface required for configuration. We are developing a driver on the AGX Orin platform to support it. In the driver, the I²C part is ignored, and we are able to successfully create the /dev/video0 node. Required modifications in the Device Tree have also been completed.

Now, we want to test the driver and the media pipeline using a test pattern. Is it possible to do this without the actual hardware? If so, how can we proceed?

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*** Please note that this reply is generated by LLM automatically ***

Based on the provided context, it appears that you are developing a driver for an FPGA device that takes SDI input and outputs CSI data on the Jetson AGX Orin platform. You have successfully created the node and made the required modifications in the Device Tree. Now, you want to test the driver and the media pipeline without the actual hardware.

In general, it is possible to test a driver and media pipeline without the actual hardware by using simulation tools or software emulators. However, the feasibility of this approach depends on the specific requirements of your driver and the complexity of the media pipeline.

Here are a few possible ways to proceed:

  1. Simulation tools: You can use simulation tools like QEMU or VirtualBox to create a virtual environment that mimics the Jetson AGX Orin platform. This would allow you to test your driver and media pipeline in a simulated environment without the need for actual hardware.
  2. Software emulators: You can use software emulators like the NVIDIA Jetson Emulator to simulate the behavior of the Jetson AGX Orin platform. This emulator can simulate the CSI interface and allow you to test your driver and media pipeline.
  3. Mock devices: You can create mock devices that simulate the behavior of the FPGA device. This would involve creating a software component that mimics the output of the FPGA device, allowing you to test your driver and media pipeline.
  4. Unit testing: You can write unit tests for your driver and media pipeline to test individual components in isolation. This would allow you to test specific functionality without the need for actual hardware.

To determine the best approach for your specific use case, you may want to consider the following factors:

  • Complexity of the media pipeline: If the media pipeline is complex and involves multiple components, simulation tools or software emulators may be more suitable.
  • Specific requirements of the driver: If the driver requires specific hardware features or interfaces, mock devices or unit testing may be more suitable.
  • Availability of resources: If you have limited resources or expertise in simulation tools or software emulators, mock devices or unit testing may be more feasible.

In comparison to other Jetson modules, the AGX Orin platform has a more complex media pipeline and requires specific hardware features. Therefore, simulation tools or software emulators may be more suitable for testing the driver and media pipeline.

In contrast, the Jetson Xavier NX Series and Jetson Orin Nano Series Modules have a more straightforward media pipeline and may be more suitable for mock devices or unit testing.

Ultimately, the choice of approach depends on your specific requirements and resources. You may want to consider consulting with NVIDIA experts or seeking guidance from the Jetson community to determine the best approach for your use case.

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Now, we want to test the driver and media pipeline using the built-in Test Pattern Generator (TPG) before the FPGA hardware starts providing real frames.

What is TPG exactly? Is it enabled only through Device Tree by setting test_pattern_en = “1” in the mode node?

(we tried this, but see no result when running v4l2-ctl -d /dev/video0 --list-ctrls).

Can TPG be used for bring-up and debugging pipelines when the sensor hardware isn’t ready?

If TPG is enabled, does the Tegra VI receive “fake frames” directly from the CSI brick so that we can capture them via /dev/video0?

What are the correct steps to properly enable and use TPG on AGX Orin?

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hello niranjan.kumar1,

please refer to public kernel sources,
for instance, $public_sources/r36.4.4/Linux_for_Tegra/source/kernel_src/nvidia-oot/drivers/media/platform/tegra/tpg
please copy this to the target, and insert the kernel module for testing.
$ chmod +x nvhost-vi-tpg-t19x.ko
$ sudo insmod nvhost-vi-tpg-t19x.ko

it shall create several video nodes,
you may test the stream as following,

$ v4l2-ctl -d /dev/video2 --list-formats-ext
ioctl: VIDIOC_ENUM_FMT
	Type: Video Capture

	[0]: 'RG10' (10-bit Bayer RGRG/GBGB)
		Size: Discrete 320x240
			Interval: Discrete 0.033s (30.000 fps)
		Size: Discrete 1280x720
			Interval: Discrete 0.033s (30.000 fps)
		Size: Discrete 1920x1080
			Interval: Discrete 0.033s (30.000 fps)
		Size: Discrete 3840x2160
			Interval: Discrete 0.033s (30.000 fps)

$ v4l2-ctl -d /dev/video2 --set-fmt-video=width=1920,height=1080,pixelformat=RG10 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=100
<<<<<<<<<<<<<<<<<<<<<<<<< 23.91 fps
<<<<<<<<<<<<<<<<<<<<<<<< 23.91 fps
<<<<<<<<<<<<<<<<<<<<<<<< 23.91 fps
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Yes, it should create several video nodes, and I’ll be able to test them as you mentioned. Is it possible to test the /dev/video0 node that was created by my driver? Also, is there any way to verify the media pipeline created by my driver? is it possible to redirect frames to the /dev/video0 node to test the driver?

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hello niranjan.kumar1,

camera connections looks like this.. Sensor -> CSI -> VI, TPG it is creating test pattern from VI side.
per your use-case to develop FPGA device, you’ll need to complete the device tree port bindings for camera connect setups.

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