芯片设计问题

目前我们发现mipi信号输入xavier NX 核心板子,信号幅度太低,另外上升沿和下降沿轻微缓慢;

想咨询下,贵司xavier NX的mipi MIPI CSI lanes的接收门限;

评估下mipi CSI的风险;

附件是测试靠近SODIMM260座子附近的测试点的眼图报告;

主要NG项目如下:

1, 测试项目,目前主要fail项是:

彩色相机 camera4,对应xavier NX的CSI4组, 主要fail项目

1.3.11 HS Data TX 20%-80% Rise Time (tR)[Burst Data], 测试结果500ps, 范围要求:小于375ps

1.3.12 HS Data TX 80%-20% Fall Time (tF)[Burst Data], 测试结果559ps, 范围要求:小于375ps

1.4.4 HS Clock TX Differential Voltage(VOD0 Pulse),, 测试结果106mv, 范围要求:140.00 mV <= VALUE <= 270.00mV

黑白相机测试了camera1的,对应xavier NX的CIS0组输入;

主要fail为:

1.3.11 HS Data TX 20%-80% Rise Time (tR)[Burst Data], HS数据的上升沿=350ps,范围是要求小于375ps;

1.3.12 HS Data TX 80%-20% Fall Time (tF)[Burst Data],测试结果为:391ps,范围要求小于375ps;

1.5.4 Data-to-Clock Skew (TSKEW(TX))(Max,Min),抖动测试,,测试结果 172mUIinst ,范围是150;

Hello,

Welcome to the NVIDIA Developer forums. Your issue should be posted in the Jetson Xavier NX category, I will move it over to the correct forum for you.

Tom K

hello 1753828207,

driver attempts to auto-calibrate by default, there’s cil_settletime to configure it manually , THS settle time of the MIPI lane, unit in nanoseconds.
please check TRM for the details, please search CLK_SETTLE and THS_SETTLE for reference,
you may also check MIPI Alliance Specification for D-PHY for details.
thanks

1 Like

hi

Hi JerryChang
感谢您的回复;我们仔细看了下, cil_settletime 好像是建立时间的调整??请帮忙确认下细节怎么调整?

其实我们想咨询的是mipi RX的接收电平门限;我们MIPI TX在源端测试是PASS的,,但是经过长距离PCB传输后,靠近NX核心板子座子260P座子附件,信号衰减到了130mv 左右;

hello user9267,

please share the use-case about the distance,
there’s camera use-case with SerDes chips which support long distance, please see-also developer guide, GMSL Protocol.
thanks

The CSI port on Jetson is standard port following MIPI spec. Please follow MIPI spec for threshold.

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